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Searched refs:RVC_RS2S (Results 1 – 2 of 2) sorted by relevance

/linux/arch/riscv/kernel/
A Dtraps_misaligned.c124 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) macro
142 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
259 #define GET_F64_RS2S(insn, regs) (get_f64_rs(RVC_RS2S(insn), 0, regs))
263 #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs))
378 insn = RVC_RS2S(insn) << SH_RD; in handle_misaligned_load()
387 insn = RVC_RS2S(insn) << SH_RD; in handle_misaligned_load()
395 insn = RVC_RS2S(insn) << SH_RD; in handle_misaligned_load()
403 insn = RVC_RS2S(insn) << SH_RD; in handle_misaligned_load()
/linux/arch/riscv/kvm/
A Dvcpu_insn.c111 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) macro
131 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
541 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()
550 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()

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