| /linux/drivers/i2c/busses/ |
| A D | i2c-acorn.c | 19 #define SCL 0x02 macro
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
36 ones |= SCL; in ioc_setscl()
38 ones &= ~SCL; in ioc_setscl()
47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
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| A D | i2c-versatile.c | 20 #define SCL (1 << 0) macro
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
52 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
77 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_i2c_sw.c | 29 #define SCL false macro
85 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw()
113 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
118 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
134 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
145 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
168 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
197 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
202 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
231 write_bit_to_ddc(ddc_handle, SCL, true); in stop_sync_sw()
[all …]
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| A D | dce_transform.h | 76 SRI(SCL_MODE, SCL, id), \
77 SRI(SCL_TAP_CONTROL, SCL, id), \
78 SRI(SCL_CONTROL, SCL, id), \
86 SRI(VIEWPORT_START, SCL, id), \
87 SRI(VIEWPORT_SIZE, SCL, id), \
94 SRI(SCL_UPDATE, SCL, id), \
147 SRI(SCL_TAP_CONTROL, SCL, id), \
148 SRI(SCL_CONTROL, SCL, id), \
156 SRI(VIEWPORT_START, SCL, id), \
157 SRI(VIEWPORT_SIZE, SCL, id), \
[all …]
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| /linux/arch/arm/boot/dts/st/ |
| A D | ste-dbx5x0-pinctrl.dtsi | 132 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
139 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
152 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
159 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
172 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
179 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
190 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
197 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
210 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
234 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
[all …]
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| /linux/drivers/rtc/ |
| A D | rtc-rs5c313.c | 73 #define SCL SCSPTR1_SPB0DT macro
95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
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| /linux/Documentation/i2c/ |
| A D | gpio-fault-injection.rst | 23 By reading this file, you get the current state of SCL. By writing, you can
25 "echo 0 > scl" you force SCL low and thus, no communication will be possible
27 the condition of SCL being unresponsive and report an error to the upper
62 being pulled low by the device while SCL is high. So, similar to the "sda" file
65 SDA after toggling SCL.
81 register 0x00 (if it has registers) when further clock pulses happen on SCL.
99 Arbitration lost is achieved by waiting for SCL going down by the master under
104 should be detected beforehand. Also note, that SCL going down is monitored
129 Start of a transfer is detected by waiting for SCL going down by the master
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| /linux/Documentation/devicetree/bindings/iio/temperature/ |
| A D | ti,tmp007.yaml | 28 0 SCL 0x43
32 1 SCL 0x47
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| /linux/Documentation/devicetree/bindings/i2c/ |
| A D | i2c-rk3x.yaml | 81 SCL frequency to use (in Hz). If omitted, 100kHz is used.
86 Number of nanoseconds the SCL signal takes to rise
94 Number of nanoseconds the SCL signal takes to fall
103 (t(f) in the I2C specification). If not specified we will use the SCL
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| A D | renesas,rcar-i2c.yaml | 97 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
103 Number of nanoseconds the IP core additionally needs to setup SCL.
108 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
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| A D | i2c-mt65xx.yaml | 89 SCL frequency to use (in Hz). If omitted, 100kHz is used.
100 description: Phandle to the regulator providing power to SCL/SDA
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| A D | xlnx,xps-iic-2.00.a.yaml | 37 Optional I2C SCL clock frequency. If not specified, do not configure
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| /linux/arch/arm/boot/dts/microchip/ |
| A D | lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts | 68 /* SCL, SDA */
74 /* SCL, SDA */
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| /linux/arch/arm/boot/dts/nvidia/ |
| A D | tegra30-apalis-eval.dts | 87 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
109 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
117 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
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| A D | tegra124-apalis-eval.dts | 80 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
100 * GEN2_I2C: I2C2_SDA/SCL (DDC) on MXM3 pin 205/207 (e.g. display EDID)
107 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
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| A D | tegra124-apalis-v1.2-eval.dts | 81 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
103 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
112 * I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
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| A D | tegra30-apalis-v1.1-eval.dts | 88 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
110 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
118 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | ddc_regs.h | 178 DDC_I2C_REG_LIST(SCL)\
197 DDC_REG_LIST_DCN2(SCL)\
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| A D | imx6q-apalis-ixora.dts | 68 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
85 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
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| /linux/Documentation/i2c/muxes/ |
| A D | i2c-mux-gpio.rst | 16 | | SCL/SDA | |-------------- | |
25 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
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| /linux/arch/arm/boot/dts/ti/omap/ |
| A D | omap4-sdp-es23plus.dts | 7 /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
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| A D | omap4-panda-a4.dts | 10 /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
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| /linux/arch/arm/boot/dts/samsung/ |
| A D | exynos4412-i9305.dts | 19 /* SCL and SDA pins are swapped */
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| /linux/Documentation/i2c/busses/ |
| A D | i2c-parport.rst | 57 SCL ----------x--------o |-----------x------------------- pin 2
97 - Obviously you cannot read SCL (so it's not really standard-compliant).
112 SCL ----------x--------x--| o---x------------------------ pin 15
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| /linux/Documentation/devicetree/bindings/i3c/ |
| A D | i3c.yaml | 44 Frequency of the SCL signal used for I3C transfers. When undefined, the
51 Frequency of the SCL signal used for I2C transfers. When undefined, the
99 supports high frequency on SCL
|