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Searched refs:SDHCI_HOST_CONTROL2 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/mmc/host/
A Dsdhci.c98 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
130 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
135 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
343 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
345 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
2607 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2615 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2715 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2719 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2747 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_reset_tuning()
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A Dsdhci-xenon.c203 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
221 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
301 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
A Dsdhci-pci-gli.c319 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
321 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
339 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
341 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
385 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
1223 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
1234 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
A Dsdhci-sprd.c342 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
374 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
559 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
562 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
A Dsdhci-acpi.c553 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
555 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
557 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
559 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
A Dsdhci-st.c261 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
A Dsdhci-brcmstb.c166 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
185 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
A Dsdhci-pxav3.c248 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
292 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
A Dsdhci-of-dwcmshc.c459 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
486 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
864 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
867 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
A Dsdhci-msm.c1327 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1387 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
2080 case SDHCI_HOST_CONTROL2: in __sdhci_msm_check_write()
2209 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2231 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2238 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
A Dsdhci-pci-core.c1658 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1660 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1662 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1664 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
A Dsdhci.h189 #define SDHCI_HOST_CONTROL2 0x3E macro
A Dsdhci-esdhc-imx.c645 if (unlikely(reg == SDHCI_HOST_CONTROL2)) { in esdhc_readw_le()
704 case SDHCI_HOST_CONTROL2: in esdhc_writew_le()
A Dsdhci-pci-o2micro.c217 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()

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