| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | sdma_v4_0.c | 519 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_init_golden_registers()
589 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_setup_ulv()
628 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_init_microcode()
630 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_init_microcode()
1026 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_ctx_switch_enable()
1863 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_sw_init()
1885 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >= in sdma_v4_0_sw_init()
1887 amdgpu_ip_version(adev, SDMA0_HWIP, 0) < in sdma_v4_0_sw_init()
1900 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_sw_init()
2090 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_process_trap_irq()
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| A D | amdgpu_sdma.c | 219 amdgpu_ucode_ip_version_decode(adev, SDMA0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in amdgpu_sdma_init_microcode()
261 if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in amdgpu_sdma_init_microcode()
263 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in amdgpu_sdma_init_microcode()
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| A D | amdgpu_discovery.c | 207 [SDMA0_HWIP] = SDMA0_HWID,
2188 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in amdgpu_discovery_set_sdma_ip_blocks()
2235 amdgpu_ip_version(adev, SDMA0_HWIP, 0)); in amdgpu_discovery_set_sdma_ip_blocks()
2438 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2460 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2521 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2545 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2573 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2574 adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2575 adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
[all …]
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| A D | dimgrey_cavefish_reg_init.c | 46 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
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| A D | aldebaran_reg_init.c | 43 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in aldebaran_reg_base_init()
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| A D | arct_reg_init.c | 44 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in arct_reg_base_init()
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| A D | vega10_reg_init.c | 47 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in vega10_reg_base_init()
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| A D | vega20_reg_init.c | 46 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in vega20_reg_base_init()
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| A D | sdma_v4_4.c | 40 uint32_t sdma_base = adev->reg_offset[SDMA0_HWIP][0][0]; in sdma_v4_4_get_reg_offset()
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| A D | sdma_v4_4_2.c | 114 return (adev->reg_offset[SDMA0_HWIP][dev_inst][0] + offset); in sdma_v4_4_2_get_reg_offset()
191 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) || in sdma_v4_4_2_init_microcode()
192 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) { in sdma_v4_4_2_init_microcode()
1284 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_4_2_fw_support_paging_queue()
1459 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) || in sdma_v4_4_2_sw_fini()
1460 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) in sdma_v4_4_2_sw_fini()
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| A D | sdma_v5_2.c | 228 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(5, 2, 1)) { in sdma_v5_2_ring_set_wptr()
1567 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v5_2_firmware_mgcg_support()
1633 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v5_2_update_medium_grain_light_sleep()
1663 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v5_2_set_clockgating_state()
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| A D | amdgpu_ucode.c | 1254 } else if (block_type == SDMA0_HWIP) { in amdgpu_ucode_legacy_naming()
1255 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in amdgpu_ucode_legacy_naming()
1403 case SDMA0_HWIP: in amdgpu_ucode_ip_version_decode()
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| A D | amdgpu_dev_coredump.c | 40 [SDMA0_HWIP] = "SDMA0",
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| A D | aqua_vanjaram.c | 229 case SDMA0_HWIP: in aqua_vanjaram_logical_to_dev_inst()
280 { SDMA0_HWIP, adev->sdma.sdma_mask }, in aqua_vanjaram_ip_map_init()
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| A D | amdgpu_fence.c | 571 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >= in amdgpu_fence_need_ring_interrupt_restore()
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| A D | sdma_v5_0.c | 236 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v5_0_init_golden_registers()
1740 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v5_0_set_clockgating_state()
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| A D | amdgpu.h | 696 SDMA0_HWIP, enumerator
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| A D | amdgpu_mes.c | 158 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) < in amdgpu_mes_init()
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| A D | sdma_v6_0.c | 1266 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v6_0_set_ras_funcs()
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| A D | amdgpu_kms.c | 517 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, SDMA0_HWIP, 0)); in amdgpu_hw_ip_info()
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| A D | amdgpu_device.c | 3474 (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >= in amdgpu_device_ip_suspend_phase2()
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_int_process_v9.c | 199 if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2)) { in event_interrupt_poison_consumption_v9()
206 } else if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) { in event_interrupt_poison_consumption_v9()
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| A D | kfd_packet_manager_v9.c | 220 return amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) >= in pm_use_ext_eng()
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| A D | kfd_device.c | 69 uint32_t sdma_version = amdgpu_ip_version(kfd->adev, SDMA0_HWIP, 0); in kfd_device_info_set_sdma_info()
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