Searched refs:SMB_CSR (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/i2c/busses/ |
| A D | i2c-sibyte.c | 24 #define SMB_CSR(a,r) ((long)(a->reg_base + r)) macro
47 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
52 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
59 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
63 SMB_CSR(adap, R_SMB_DATA)); in smbus_xfer()
65 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
72 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
76 SMB_CSR(adap, R_SMB_DATA)); in smbus_xfer()
78 SMB_CSR(adap, R_SMB_DATA)); in smbus_xfer()
80 SMB_CSR(adap, R_SMB_START)); in smbus_xfer()
[all …]
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| /linux/arch/mips/sibyte/swarm/ |
| A D | rtc_m41t81.c | 81 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg)) macro
88 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_read()
90 SMB_CSR(R_SMB_START)); in m41t81_read()
96 SMB_CSR(R_SMB_START)); in m41t81_read()
103 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_read()
107 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in m41t81_read()
115 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_write()
116 __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA)); in m41t81_write()
118 SMB_CSR(R_SMB_START)); in m41t81_write()
125 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_write()
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| A D | rtc_xicor1241.c | 56 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg)) macro
60 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read()
63 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); in xicor_read()
64 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); in xicor_read()
66 SMB_CSR(R_SMB_START)); in xicor_read()
72 SMB_CSR(R_SMB_START)); in xicor_read()
79 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in xicor_read()
83 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in xicor_read()
91 __raw_writeq(addr, SMB_CSR(R_SMB_CMD)); in xicor_write()
94 SMB_CSR(R_SMB_START)); in xicor_write()
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| /linux/drivers/net/ethernet/marvell/ |
| A D | sky2.h | 1021 SMB_CSR = 0x0e44, /* 32 bit SMBus Control/Status Register */ enumerator
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