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Searched refs:SME (Results 1 – 21 of 21) sorted by relevance

/linux/Documentation/arch/x86/
A Damd-memory-encryption.rst7 Secure Memory Encryption (SME) and Secure Encrypted Virtualization (SEV) are
10 SME provides the ability to mark individual pages of memory as encrypted using
21 key is the same key which is used in SME.
43 CPUID function 0x8000001f reports information related to SME::
46 Bit[0] indicates support for SME
57 determine if SME is enabled and/or to enable memory encryption::
76 The state of SME in the Linux kernel can be documented as follows:
79 The CPU supports SME (determined through CPUID instruction).
86 the encryption bit to page table entries (the SME mask in the
89 SME can also be enabled and activated in the BIOS. If SME is enabled and
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/linux/Documentation/arch/arm64/
A Dsme.rst6 order to support use of the ARM Scalable Matrix Extension (SME).
11 included in SME.
13 This document does not aim to describe the SME architecture or programmer's
15 model features for SME is included in Appendix A.
25 AT_HWCAP2 entry. Presence of this flag implies the presence of the SME
34 * Support for the execution of SME instructions in userspace can also be
54 This list may be extended over time as the SME architecture evolves.
214 EINVAL: SME not supported, invalid vector length requested, or
268 EINVAL: SME not supported.
407 Appendix A. SME programmer's model (informative)
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A Dsve.rst12 (SME).
63 * On hardware that supports the SME extensions, HWCAP2_SME will also be
64 reported in the AT_HWCAP2 aux vector entry. Among other things SME adds
66 separate SME vector length and the same Z/V registers. See sme.rst
72 ptrace(PTRACE_GETREGSET, pid, NT_ARM_SVE, &iov). Note that when SME is
362 payload is available, this is only possible when SME is implemented.
380 * In systems supporting SME when in streaming mode a GETREGSET for
396 * Where SME is implemented it is not possible to GETREGSET the register
A Delf_hwcaps.rst245 Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described
A Dcpu-feature-registers.rst178 | SME | [27-24] | y |
/linux/arch/arm64/tools/
A Dcpucaps65 SME
A Dsysreg976 UnsignedEnum 27:24 SME
1090 0b0000 SME
/linux/Documentation/admin-guide/kdump/
A Dvmcoreinfo.rst389 AMD-specific with SME support: it indicates the secure memory encryption
391 encrypted. If SME is enabled in the first kernel, the crash kernel's
393 mask. This is used to remove the SME mask and obtain the true physical
397 additional SME-relevant info can be placed in that variable.
401 [ misc ][ enc bit ][ other misc SME info ]
/linux/drivers/sbus/char/
A DKconfig47 Kernel support for temperature and fan monitoring on Sun SME
/linux/arch/arm64/include/asm/
A Dhwcap.h120 #define KERNEL_HWCAP_SME __khwcap2_feature(SME)
/linux/Documentation/devicetree/bindings/net/
A Dmicrochip,sparx5-switch.yaml29 equipment in SMB, SME, and Enterprise where high port count
/linux/drivers/i2c/busses/
A Di2c-rcar.c95 #define SME BIT(0) /* SCL Mask Enable */ macro
245 u32 icccr2 = CDFD | HLSE | SME; in rcar_i2c_init()
/linux/arch/arm64/kvm/
A Dnested.c1061 if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP) || in kvm_init_nv_sysregs()
1100 if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP)) in kvm_init_nv_sysregs()
A Dsys_regs.c1680 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SME, IMP)) in sme_visibility()
/linux/arch/sh/boards/
A DKconfig153 SME product line.
/linux/arch/arm64/kernel/
A Dcpufeature.c2767 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, IMP)
2784 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, SME2)
3030 HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
/linux/Documentation/virt/hyperv/
A Dcoco.rst25 * AMD processor with SEV-SNP. Hyper-V does not run guest VMs with AMD SME,
/linux/tools/arch/x86/kcpuid/
A Dcpuid.csv952 # AMD encrypted memory capabilities enumeration (SME/SEV)
/linux/arch/x86/
A DKconfig1550 bool "AMD Secure Memory Encryption (SME) support"
1562 Encryption (SME).
/linux/arch/arm64/
A DKconfig2222 The Scalable Matrix Extension (SME) is an extension to the AArch64
/linux/Documentation/admin-guide/
A Dkernel-parameters.txt3448 mem_encrypt= [X86-64] AMD Secure Memory Encryption (SME) control
3451 mem_encrypt=on: Activate SME
3452 mem_encrypt=off: Do not activate SME

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