Searched refs:SSPP_DMA0 (Results 1 – 25 of 28) sorted by relevance
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_cfg.c | 29 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
118 [SSPP_DMA0] = 4,
199 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
288 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
386 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
458 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
540 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
758 [SSPP_DMA0] = 4,
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| A D | mdp5_ctl.c | 298 case SSPP_DMA0: return MDP5_CTL_LAYER_REG_DMA0(stage); in mdp_ctl_blend_mask()
321 case SSPP_DMA0: return MDP5_CTL_LAYER_EXT_REG_DMA0_BIT3; in mdp_ctl_blend_ext_mask()
449 case SSPP_DMA0: return MDP5_CTL_FLUSH_DMA0; in mdp_ctl_flush_mask_pipe()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_4_1_sdm670.h | 42 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_3_sm6115.h | 47 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_5_qcm2290.h | 47 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_9_sm6375.h | 48 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_3_3_sdm630.h | 71 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_5_4_sm6125.h | 78 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_2_sc7180.h | 60 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_4_sm6350.h | 68 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_7_2_sc7280.h | 65 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_3_2_sdm660.h | 80 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_3_0_msm8998.h | 101 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_4_0_sdm845.h | 99 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_5_2_sm7150.h | 89 .name = "sspp_2", .id = SSPP_DMA0,
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| A D | dpu_5_0_sm8150.h | 109 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_6_0_sm8250.h | 107 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_7_0_sm8350.h | 107 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_9_0_sm8550.h | 95 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_10_0_sm8650.h | 95 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_5_1_sc8180x.h | 108 .name = "sspp_8", .id = SSPP_DMA0,
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| A D | dpu_8_1_sm8450.h | 108 .name = "sspp_8", .id = SSPP_DMA0,
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_top.c | 104 status->sspp[SSPP_DMA0] = (value >> 20) & 0x3; in dpu_hw_get_danger_status()
216 status->sspp[SSPP_DMA0] = (value >> 20) & 0x1; in dpu_hw_get_safe_status()
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| A D | dpu_hw_mdss.h | 97 SSPP_DMA0, enumerator
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| A D | dpu_hw_ctl.c | 206 case SSPP_DMA0: in dpu_hw_ctl_update_pending_flush_sspp()
470 [SSPP_DMA0] = { { 0, 18, 16 }, { 2, 8 } },
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Completed in 28 milliseconds
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