Searched refs:SSPP_VIG3 (Results 1 – 17 of 17) sorted by relevance
| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_top.c | 99 status->sspp[SSPP_VIG3] = (value >> 10) & 0x3; in dpu_hw_get_danger_status()
211 status->sspp[SSPP_VIG3] = (value >> 10) & 0x1; in dpu_hw_get_safe_status()
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| A D | dpu_hw_mdss.h | 92 SSPP_VIG3, enumerator
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| A D | dpu_hw_ctl.c | 191 case SSPP_VIG3: in dpu_hw_ctl_update_pending_flush_sspp()
465 [SSPP_VIG3] = { { 0, 26, 6 }, { 3, 12 } },
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_ctl.c | 300 case SSPP_VIG3: return MDP5_CTL_LAYER_REG_VIG3(stage); in mdp_ctl_blend_mask()
323 case SSPP_VIG3: return MDP5_CTL_LAYER_EXT_REG_VIG3_BIT3; in mdp_ctl_blend_ext_mask()
451 case SSPP_VIG3: return MDP5_CTL_FLUSH_VIG3; in mdp_ctl_flush_mask_pipe()
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| A D | mdp5_cfg.c | 287 [SSPP_VIG2] = 7, [SSPP_VIG3] = 19,
539 [SSPP_VIG2] = 7, [SSPP_VIG3] = 19,
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| A D | mdp5_kms.c | 607 SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3, in hwpipe_init() enumerator
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| /linux/drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_3_0_msm8998.h | 93 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_4_0_sdm845.h | 91 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_5_0_sm8150.h | 101 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_6_0_sm8250.h | 99 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_7_0_sm8350.h | 99 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_9_0_sm8550.h | 88 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_10_0_sm8650.h | 88 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_5_1_sc8180x.h | 100 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_8_1_sm8450.h | 100 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_8_0_sc8280xp.h | 99 .name = "sspp_3", .id = SSPP_VIG3,
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| A D | dpu_9_2_x1e80100.h | 87 .name = "sspp_3", .id = SSPP_VIG3,
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