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Searched refs:Speed (Results 1 – 25 of 167) sorted by relevance

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/linux/arch/mips/boot/dts/brcm/
A Dbcm63268-comtrend-vr-3032u.dts31 /* GPHY0 Speed 0 */
37 /* GPHY0 Speed 1 */
87 /* EPHY0 Speed */
92 /* EPHY1 Speed */
97 /* EPHY2 Speed */
/linux/drivers/platform/x86/intel/speed_select_if/
A DKconfig1 menu "Intel Speed Select Technology interface support"
9 tristate "Intel(R) Speed Select Technology interface drivers"
12 This config enables the Intel(R) Speed Select Technology interface
20 Intel(R) Speed Select Technology features from the user space.
/linux/Documentation/admin-guide/pm/
A Dintel-speed-select.rst4 Intel(R) Speed Select Technology User Guide
67 Intel(R) Speed Select Technology
100 Intel(R) Speed Select Technology
125 Intel(R) Speed Select Technology
144 Intel(R) Speed Select Technology
173 Intel(R) Speed Select Technology
199 Intel(R) Speed Select Technology
244 Intel(R) Speed Select Technology
280 Intel(R) Speed Select Technology
344 Intel(R) Speed Select Technology
[all …]
/linux/Documentation/devicetree/bindings/phy/
A Dqcom,usb-hs-28nm.yaml7 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
A Dsocionext,uniphier-usb3ss-phy.yaml7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about Super-Speed PHY.
A Dqcom,snps-eusb2-repeater.yaml39 description: High-Speed disconnect threshold
46 description: High-Speed transmit amplitude
53 description: High-Speed TX pre-emphasis tuning
A Dsocionext,uniphier-usb3hs-phy.yaml7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about High-Speed PHY.
A Dphy-tegra194-p2u.yaml13 Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
14 Speed) each interfacing with 12 and 8 P2U instances respectively.
A Dphy-stm32-usbphyc.yaml11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
91 # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
92 # Speed, LS for Low-Speed)
/linux/Documentation/devicetree/bindings/usb/
A Dnxp,ptn36502.yaml31 description: Super Speed (SS) Output endpoint to the Type-C connector
35 description: Super Speed (SS) Input endpoint from the Super-Speed PHY
A Dusb-switch.yaml40 Super Speed (SS) Output endpoint to the Type-C connector
45 Super Speed (SS) Input endpoint from the Super-Speed PHY
A Dmicrochip,usb5744.yaml10 Microchip's USB5744 SmartHubTM IC is a 4 port, SuperSpeed (SS)/Hi-Speed (HS),
12 Gen 1 specification. The USB5744 also supports Full Speed (FS) and Low Speed
A Donnn,nb7vpq904m.yaml32 description: Super Speed (SS) Output endpoint to the Type-C connector
36 description: Super Speed (SS) Input endpoint from the Super-Speed PHY
A Dti,hd3ss3220.yaml36 description: Super Speed (SS) MUX inputs connected to SS capable connector.
40 description: Output of 2:1 MUX connected to Super Speed (SS) data bus.
/linux/Documentation/devicetree/bindings/clock/
A Dst,stm32mp25-rcc.yaml36 - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
37 - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
42 - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
43 - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
A Dgoogle,gs101-clock.yaml113 - description: High Speed Interface bus clock (from CMU_TOP)
114 - description: High Speed Interface pcie clock (from CMU_TOP)
115 - description: High Speed Interface ufs clock (from CMU_TOP)
116 - description: High Speed Interface mmc clock (from CMU_TOP)
/linux/drivers/net/ethernet/altera/
A DKconfig3 tristate "Altera Triple-Speed Ethernet MAC support"
12 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
/linux/Documentation/devicetree/bindings/hwmon/
A Dadi,max31760.yaml7 title: Analog Devices MAX31760 Fan-Speed Controller
13 Analog Devices MAX31760 Fan-Speed Controller
/linux/Documentation/networking/device_drivers/ethernet/intel/
A De1000.rst15 - Speed and Duplex Configuration
40 For more information about the AutoNeg, Duplex, and Speed
41 parameters, see the "Speed and Duplex Configuration" section in
58 advertised by the adapter. When this parameter is used, the Speed and
62 Refer to the Speed and Duplex section of this readme for more
243 Speed section in Command Line Parameters
254 speed. Duplex should also be set when Speed is set to either 10 or 100.
335 Speed and Duplex Configuration
339 These keywords are Speed, Duplex, and AutoNeg.
353 - If Speed = 10 or 100, then both Speed and Duplex should be set. Auto-
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/linux/drivers/dma/mediatek/
A DKconfig4 tristate "MediaTek High-Speed DMA controller support"
9 Enable support for High-Speed DMA controller on MediaTek
/linux/Documentation/sound/cards/
A Dhdspm.rst29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
46 * Quad Speed -- 1..16 channels
58 Single Speed -- 32000, 44100, 48000
60 Double Speed -- 64000, 88200, 96000 (untested)
62 Quad Speed -- 128000, 176400, 192000 (untested)
148 Speed-mode or Slave (Autosync). Also see "Preferred Sync Ref"
/linux/drivers/net/ethernet/oki-semi/pch_gbe/
A Dpch_gbe_param.c43 static int Speed = OPTION_UNSET; variable
44 module_param(Speed, int, 0);
45 MODULE_PARM_DESC(Speed, "Speed setting");
285 speed = Speed; in pch_gbe_check_copper_options()
/linux/drivers/phy/qualcomm/
A DKconfig184 tristate "Qualcomm 28nm High-Speed PHY"
190 High-Speed PHY driver. This driver supports the Hi-Speed PHY which
195 tristate "Qualcomm USB Super-Speed PHY driver"
200 Enable this to support the Super-Speed USB transceiver on various
/linux/Documentation/devicetree/bindings/serial/
A Dnxp-lpc32xx-hsuart.txt1 * NXP LPC32xx SoC High Speed UART
/linux/drivers/phy/xilinx/
A DKconfig12 Enable this to support ZynqMP High Speed Gigabit Transceiver

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