Searched refs:Sum (Results 1 – 10 of 10) sorted by relevance
39 (U = \Sum u_i) <= 156 同时，我们可以说，最坏的情况下的截止日期失败，将是Sum e_i；也就是说，有一个有界的迟延（在假127 例如，Sum (c_i)可能超过C
24 DAC +----------->|Sum|---+34 position, meaning that the signal is passed through the 'Sum' mixer. Similarly
44 in7_input Sum of shunt voltage(uV) channels46 curr4_input Sum of current(mA) measurement channels,
67 Sum Limit register contains the programmed value that is compared68 to the value in the Shunt-Voltage Sum register in order to
305 fInt Sum; in fAdd() local307 Sum.full = X.full + Y.full; in fAdd()309 return Sum; in fAdd()
32 (U = \Sum u_i) <= 159 \Sum e_i; that is, there is a bounded tardiness (under the assumption148 e.g. \Sum (c_i) may exceed C
587 \Sum (runtime_i / period_i) < global_dl_utilization_cap).
55 Sum of all reads and writes that have bypassed the cache (due
613 Sum of all btree writes, in (kilo/mega/giga) bytes639 Sum of all non data writes (btree writes and all other metadata).652 Sum of all data that has been written to the cache; comparison with
749 # Sum the products.
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