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Searched refs:TARGET_QSYS (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/net/ethernet/microchip/lan966x/
A Dlan966x_regs.h25 TARGET_QSYS = 46, enumerator
1379 #define QSYS_TAS_CFG_CTRL __REG(TARGET_QSYS, 0, 1, 57372, 0, 1, 12, 0, 0, 1, 4)
1406 #define QSYS_TAS_GS_CTRL __REG(TARGET_QSYS, 0, 1, 57372, 0, 1, 12, 4, 0, 1, 4)
1415 #define QSYS_TAS_STM_CFG __REG(TARGET_QSYS, 0, 1, 57372, 0, 1, 12, 8, 0, 1, 4)
1439 #define QSYS_TAS_BT_NSEC __REG(TARGET_QSYS, 0, 1, 27904, 0, 1, 64, 0, 0, 1, 4)
1448 #define QSYS_TAS_BT_SEC_LSB __REG(TARGET_QSYS, 0, 1, 27904, 0, 1, 64, 4, 0, 1, 4)
1451 #define QSYS_TAS_BT_SEC_MSB __REG(TARGET_QSYS, 0, 1, 27904, 0, 1, 64, 8, 0, 1, 4)
1490 #define QSYS_TAS_GCL_CT_CFG __REG(TARGET_QSYS, 0, 1, 27968, 0, 1, 16, 0, 0, 1, 4)
1511 #define QSYS_TAS_GCL_CT_CFG2 __REG(TARGET_QSYS, 0, 1, 27968, 0, 1, 16, 4, 0, 1, 4)
1526 #define QSYS_TAS_GCL_TM_CFG __REG(TARGET_QSYS, 0, 1, 27968, 0, 1, 16, 8, 0, 1, 4)
[all …]
A Dlan966x_main.c62 { TARGET_QSYS, 0x100000, 1 }, /* 0xe2100000 */
/linux/drivers/net/ethernet/microchip/sparx5/
A Dsparx5_main.c198 { TARGET_QSYS, 0x110a0000, 2 }, /* 0x6110a0000 */
A Dsparx5_main_regs.h48 TARGET_QSYS = 178, enumerator
6427 #define QSYS_PAUSE_CFG(r) __REG(TARGET_QSYS,\
6455 #define QSYS_ATOP(r) __REG(TARGET_QSYS,\
6465 #define QSYS_FWD_PRESSURE(r) __REG(TARGET_QSYS,\
6481 #define QSYS_ATOP_TOT_CFG __REG(TARGET_QSYS,\
6491 #define QSYS_CAL_AUTO(r) __REG(TARGET_QSYS,\
6501 #define QSYS_CAL_CTRL __REG(TARGET_QSYS,\
6523 #define QSYS_RAM_INIT __REG(TARGET_QSYS,\

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