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/linux/arch/arm64/boot/dts/qcom/
A Dsc7280-herobrine-villager-r1.dtsi26 "TX SWR_ADC0", "ADC1_OUTPUT",
27 "TX SWR_ADC1", "ADC2_OUTPUT",
28 "TX SWR_ADC2", "ADC3_OUTPUT",
29 "TX SWR_DMIC0", "DMIC1_OUTPUT",
30 "TX SWR_DMIC1", "DMIC2_OUTPUT",
31 "TX SWR_DMIC2", "DMIC3_OUTPUT",
32 "TX SWR_DMIC3", "DMIC4_OUTPUT",
33 "TX SWR_DMIC4", "DMIC5_OUTPUT",
34 "TX SWR_DMIC5", "DMIC6_OUTPUT",
35 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
A Dsc7280-herobrine-audio-wcd9385.dtsi23 "TX SWR_ADC0", "ADC1_OUTPUT",
24 "TX SWR_ADC1", "ADC2_OUTPUT",
25 "TX SWR_ADC2", "ADC3_OUTPUT",
26 "TX SWR_DMIC0", "DMIC1_OUTPUT",
27 "TX SWR_DMIC1", "DMIC2_OUTPUT",
28 "TX SWR_DMIC2", "DMIC3_OUTPUT",
29 "TX SWR_DMIC3", "DMIC4_OUTPUT",
30 "TX SWR_DMIC4", "DMIC5_OUTPUT",
31 "TX SWR_DMIC5", "DMIC6_OUTPUT",
32 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
A Dsc7280-crd-r3.dts104 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
A Dsc7280-idp.dtsi104 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
/linux/drivers/spi/
A Dspi-loopback-test.c96 .tx_buf = TX(0),
123 .tx_buf = TX(0),
148 .tx_buf = TX(0),
169 .tx_buf = TX(0),
183 .tx_buf = TX(0),
199 .tx_buf = TX(0),
215 .tx_buf = TX(0),
233 .tx_buf = TX(0),
249 .tx_buf = TX(0),
277 .tx_buf = TX(0),
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
A Drenesas,dw-hdmi.yaml7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
29 - renesas,r8a77965-hdmi # for R-Car M3-N compatible HDMI TX
A Dsynopsys,dw-hdmi.yaml7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
/linux/Documentation/devicetree/bindings/net/
A Dmicrel-ksz90x1.txt51 - txen-skew-ps : Skew control of TX CTL pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
57 - txd1-skew-ps : Skew control of TX data 1 pad
58 - txd2-skew-ps : Skew control of TX data 2 pad
59 - txd3-skew-ps : Skew control of TX data 3 pad
138 - txc-skew-ps : Skew control of TX clock pad
143 - txen-skew-ps : Skew control of TX CTL pad
148 - txd0-skew-ps : Skew control of TX data 0 pad
149 - txd1-skew-ps : Skew control of TX data 1 pad
150 - txd2-skew-ps : Skew control of TX data 2 pad
[all …]
A Dxlnx,axi-ethernet.yaml13 segments of memory for buffering TX and RX, as well as the capability of
14 offloading TX/RX checksum calculation off the processor.
47 present DMA node should contains TX/RX DMA interrupts else DMA interrupt
74 TX checksum offload. 0 or empty for disabling TX checksum offload,
75 1 to enable partial TX checksum offload and 2 to enable full TX
114 from that device (DMA registers and DMA TX/RX interrupts) rather than
129 description: TX and RX DMA channel phandle
/linux/Documentation/devicetree/bindings/sound/
A Dgoogle,sc7280-herobrine.yaml113 "TX SWR_ADC0", "ADC1_OUTPUT",
114 "TX SWR_ADC1", "ADC2_OUTPUT",
115 "TX SWR_ADC2", "ADC3_OUTPUT",
116 "TX SWR_DMIC0", "DMIC1_OUTPUT",
117 "TX SWR_DMIC1", "DMIC2_OUTPUT",
118 "TX SWR_DMIC2", "DMIC3_OUTPUT",
119 "TX SWR_DMIC3", "DMIC4_OUTPUT";
A Dqcom,wcd937x-sdw.yaml14 It has RX and TX Soundwire slave devices. This bindings is for the
31 WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2
32 WCD9370 TX Port 2 (ADC2, 3) <=> SWR2 Port 2
33 WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3
34 WCD9370 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4
A Dnvidia,tegra30-ahub.txt61 For TX CIFs, the numbers indicate the bit position within the AHUB routing
62 registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
A Ddavinci-mcasp-audio.yaml52 0 - Inactive, 1 - TX, 2 - RX
96 specify the drive on TX pin during inactive time slots
110 - description: TX interrupt
114 - description: TX and RX interrupts
196 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */
/linux/Documentation/input/devices/
A Dwalkera0701.rst24 Cable: (walkera TX to parport)
26 Walkera WK-0701 TX S-VIDEO connector::
28 (back side of TX)
45 walkera0701 module, check dmesg for error messages. Connect TX to PC by
46 cable and run jstest /dev/input/js0 to see values from TX. If no value can
47 be changed by TX "joystick", check output from /proc/interrupts. Value for
48 (usually irq7) parport must increase if TX is on.
113 directly controlled from TX). Binary representations are the same as in first
/linux/sound/soc/fsl/
A Dimx-audio-rpmsg.c40 spin_lock_irqsave(&info->lock[TX], flags); in imx_audio_rpmsg_cb()
44 msg->r_msg.param.buffer_tail %= info->num_period[TX]; in imx_audio_rpmsg_cb()
45 spin_unlock_irqrestore(&info->lock[TX], flags); in imx_audio_rpmsg_cb()
46 info->callback[TX](info->callback_param[TX]); in imx_audio_rpmsg_cb()
A Dfsl_ssi.c57 #define TX 1 macro
407 int dir = tx ? TX : RX; in fsl_ssi_config_enable()
511 int adir = tx ? RX : TX; in fsl_ssi_config_disable()
512 int dir = tx ? TX : RX; in fsl_ssi_config_disable()
594 vals[TX].stcr = SSI_STCR_TFEN0; in fsl_ssi_setup_regvals()
599 vals[RX].scr = vals[TX].scr = 0; in fsl_ssi_setup_regvals()
603 vals[TX].stcr |= SSI_STCR_TFEN1; in fsl_ssi_setup_regvals()
608 vals[TX].sier |= SSI_SIER_TDMAE; in fsl_ssi_setup_regvals()
611 vals[TX].sier |= SSI_SIER_TIE; in fsl_ssi_setup_regvals()
877 vals[TX].stcr |= SSI_STCR_TFEN1; in fsl_ssi_hw_params()
[all …]
/linux/Documentation/networking/
A Dmac80211-auth-assoc-deauth.txt31 mac80211->driver: TX directed probe request
35 mac80211->driver: TX auth frame
39 mac80211->driver: TX auth frame
59 mac80211->driver: TX assoc
86 mac80211->driver: TX deauth/disassoc
A Ddriver.rst91 And then at the end of your TX reclamation event handling:
119 For example, this means that it is not allowed for your TX
120 mitigation scheme to let TX packets "hang out" in the TX
121 ring unreclaimed forever if no new TX packets are sent.
/linux/Documentation/devicetree/bindings/dma/
A Dstericsson,dma40.yaml71 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
72 50: Hash Accelerator 1 TX
73 51: memcpy TX (to be used by the DMA driver for memcpy operations)
84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
85 63: Hash Accelerator 0 TX
/linux/drivers/net/dsa/sja1105/
A DKconfig21 - SJA1110A (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 10 ports)
22 - SJA1110B (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 9 ports)
23 - SJA1110C (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 7 ports)
24 - SJA1110D (Gen. 3, SGMII, TT-Ethernet, no 100base-TX PHY, 7 ports)
/linux/Documentation/devicetree/bindings/clock/
A Dstarfive,jh7110-syscrg.yaml24 - description: External I2S TX bit clock
25 - description: External I2S TX left/right channel clock
38 - description: External I2S TX bit clock
39 - description: External I2S TX left/right channel clock
A Dqcom,qca8k-nsscc.yaml38 - description: UNIPHY0 TX 312P5M/125M clock source
40 - description: UNIPHY1 TX 312P5M/125M clock source
42 - description: UNIPHY1 TX 312P5M clock source
/linux/drivers/usb/chipidea/
A Dudc.c63 return num + ((dir == TX) ? 16 : 0); in hw_ep_bit()
146 if (dir == TX) { in hw_ep_enable()
716 if (hwep->dir == TX) { in _hardware_dequeue()
819 hwep->dir = (hwep->dir == TX) ? RX : TX; in _ep_set_halt()
1023 TX : RX; in isr_get_status_response()
1186 if (dir == TX) in isr_setup_packet_handler()
1238 if (dir == TX) in isr_setup_packet_handler()
1298 ci->ep0_dir = TX; in isr_setup_packet_handler()
1456 hwep->dir = (hwep->dir == TX) ? RX : TX; in ep_disable()
1856 for (j = RX; j <= TX; j++) { in init_eps()
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
A Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
/linux/arch/arm64/boot/dts/amlogic/
A Dmeson-gxbb-nanopi-k2.dts240 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
253 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
254 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
289 "Bluetooth UART TX", "Bluetooth UART RX",

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