Searched refs:W5_CMD_ENC_SEQ_INDEPENDENT_SLICE (Results 1 – 2 of 2) sorted by relevance
547 #define W5_CMD_ENC_SEQ_INDEPENDENT_SLICE (W5_REG_BASE + 0x140) macro
1833 vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_INDEPENDENT_SLICE, in wave5_vpu_enc_init_seq()1836 vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_INDEPENDENT_SLICE, in wave5_vpu_enc_init_seq()
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