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Searched refs:WR (Results 1 – 25 of 30) sorted by relevance

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/linux/drivers/ata/pata_parport/
A Dbpck.c109 WR(4, 0); in bpck_write_block()
128 WR(4, 8); in bpck_write_block()
137 WR(4, 8); in bpck_write_block()
146 WR(4, 8); in bpck_write_block()
165 WR(4, 0); in bpck_read_block()
185 WR(4, 8); in bpck_read_block()
194 WR(4, 8); in bpck_read_block()
203 WR(4, 8); in bpck_read_block()
256 WR(5,8); in bpck_connect()
393 WR(4, 0); in bpck_read_eeprom()
[all …]
A Depia.c114 WR(0x86, 8); in epia_connect()
167 WR(0x84, 3); in epia_read_block()
175 WR(0x84, 3); in epia_read_block()
183 WR(0x84, 3); in epia_read_block()
215 WR(0x84, 1); in epia_write_block()
220 WR(0x84, 0); in epia_write_block()
224 WR(0x84, 1); in epia_write_block()
229 WR(0x84, 0); in epia_write_block()
258 WR(2, 1); WR(3, 1); in epia_test_proto()
264 WR(0x84, 8); in epia_test_proto()
[all …]
A Depat.c237 WR(0x8, 0x12); in epat_connect()
238 WR(0xc, 0x14); in epat_connect()
239 WR(0x12, 0x10); in epat_connect()
240 WR(0xe, 0xf); in epat_connect()
241 WR(0xf, 4); in epat_connect()
243 WR(0xe, 0xd); in epat_connect()
244 WR(0xf, 0); in epat_connect()
258 WR(8, 0x10); in epat_connect()
259 WR(0xc, 0x14); in epat_connect()
260 WR(0xa, 0x38); in epat_connect()
[all …]
/linux/drivers/i2c/busses/
A Di2c-au1550.c107 WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC); in do_address()
123 WR(adap, PSC_SMBTXRX, addr); in do_address()
124 WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS); in do_address()
168 WR(adap, PSC_SMBTXRX, 0); in i2c_read()
196 WR(adap, PSC_SMBTXRX, data); in i2c_write()
205 WR(adap, PSC_SMBTXRX, data); in i2c_write()
258 WR(priv, PSC_SMBCFG, 0); in i2c_au1550_setup()
264 WR(priv, PSC_SMBCFG, cfg); in i2c_au1550_setup()
270 WR(priv, PSC_SMBCFG, cfg); in i2c_au1550_setup()
282 WR(priv, PSC_SMBCFG, cfg); in i2c_au1550_setup()
[all …]
/linux/include/linux/ceph/
A Drados.h228 f(WRITE, __CEPH_OSD_OP(WR, DATA, 1), "write") \
231 f(ZERO, __CEPH_OSD_OP(WR, DATA, 4), "zero") \
232 f(DELETE, __CEPH_OSD_OP(WR, DATA, 5), "delete") \
235 f(APPEND, __CEPH_OSD_OP(WR, DATA, 6), "append") \
243 f(CREATE, __CEPH_OSD_OP(WR, DATA, 13), "create") \
246 f(WATCH, __CEPH_OSD_OP(WR, DATA, 15), "watch") \
291 f(RMXATTR, __CEPH_OSD_OP(WR, ATTR, 4), "rmxattr") \
305 f(WRLOCK, __CEPH_OSD_OP(WR, LOCK, 1), "wrlock") \
307 f(RDLOCK, __CEPH_OSD_OP(WR, LOCK, 3), "rdlock") \
309 f(UPLOCK, __CEPH_OSD_OP(WR, LOCK, 5), "uplock") \
[all …]
/linux/sound/soc/au1x/
A Dac97c.c103 WR(ctx, AC97_CMDRESP, CMD_IDX(r) | CMD_READ); in au1xac97c_ac97_read()
161 WR(ctx, AC97_CONFIG, ctx->cfg | CFG_SG); in au1xac97c_ac97_warm_reset()
162 WR(ctx, AC97_CONFIG, ctx->cfg); in au1xac97c_ac97_warm_reset()
170 WR(ctx, AC97_CONFIG, ctx->cfg | CFG_RS); in au1xac97c_ac97_cold_reset()
172 WR(ctx, AC97_CONFIG, ctx->cfg); in au1xac97c_ac97_cold_reset()
267 WR(ctx, AC97_ENABLE, EN_D | EN_CE); in au1xac97c_drvprobe()
268 WR(ctx, AC97_ENABLE, EN_CE); in au1xac97c_drvprobe()
271 WR(ctx, AC97_CONFIG, ctx->cfg); in au1xac97c_drvprobe()
313 WR(ctx, AC97_ENABLE, EN_D | EN_CE); in au1xac97c_drvresume()
314 WR(ctx, AC97_ENABLE, EN_CE); in au1xac97c_drvresume()
[all …]
A Di2sc.c75 static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v) in WR() function
146 WR(ctx, I2S_ENABLE, EN_D | EN_CE); in au1xi2s_trigger()
147 WR(ctx, I2S_ENABLE, EN_CE); in au1xi2s_trigger()
149 WR(ctx, I2S_CFG, ctx->cfg); in au1xi2s_trigger()
154 WR(ctx, I2S_CFG, ctx->cfg); in au1xi2s_trigger()
155 WR(ctx, I2S_ENABLE, EN_D); /* power off */ in au1xi2s_trigger()
279 WR(ctx, I2S_ENABLE, EN_D); /* clock off, disable */ in au1xi2s_drvremove()
287 WR(ctx, I2S_ENABLE, EN_D); /* clock off, disable */ in au1xi2s_drvsuspend()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
A Dgddr3.c73 int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi; in nvkm_gddr3_calc() local
79 WR = ram->next->bios.timing_10_WR; in nvkm_gddr3_calc()
87 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_gddr3_calc()
103 WR = ramxlat(ramgddr3_wr_lo, WR); in nvkm_gddr3_calc()
104 if (CL < 0 || CWL < 1 || CWL > 7 || WR < 0) in nvkm_gddr3_calc()
115 ram->mr[1] |= (WR & 0x03) << 4; in nvkm_gddr3_calc()
116 ram->mr[1] |= (WR & 0x04) << 5; in nvkm_gddr3_calc()
A Dsddr2.c63 int CL, WR, DLL = 0, ODT = 0; in nvkm_sddr2_calc() local
68 WR = ram->next->bios.timing_10_WR; in nvkm_sddr2_calc()
74 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr2_calc()
87 WR = ramxlat(ramddr2_wr, WR); in nvkm_sddr2_calc()
88 if (CL < 0 || WR < 0) in nvkm_sddr2_calc()
92 ram->mr[0] |= (WR & 0x07) << 9; in nvkm_sddr2_calc()
A Dsddr3.c72 int CWL, CL, WR, DLL = 0, ODT = 0; in nvkm_sddr3_calc() local
84 WR = ram->next->bios.timing_10_WR; in nvkm_sddr3_calc()
90 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr3_calc()
102 WR = ramxlat(ramddr3_wr, WR); in nvkm_sddr3_calc()
103 if (CL < 0 || CWL < 0 || WR < 0) in nvkm_sddr3_calc()
107 ram->mr[0] |= (WR & 0x07) << 9; in nvkm_sddr3_calc()
A Dgddr5.c38 int WL, CL, WR, at[2], dt, ds; in nvkm_gddr5_calc() local
60 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_gddr5_calc()
70 if (WL < 1 || WL > 7 || CL < 5 || CL > 36 || WR < 4 || WR > 35) in nvkm_gddr5_calc()
73 WR -= 4; in nvkm_gddr5_calc()
76 ram->mr[0] |= (WR & 0x0f) << 8; in nvkm_gddr5_calc()
118 ram->mr[8] |= (WR & 0x10) >> 3; in nvkm_gddr5_calc()
A Dramnv50.c110 timing[1] = (T(WR) + 1 + T(CWL)) << 24 | in nv50_ram_timing_calc()
176 T(WR) = ((timing[1] >> 24) & 0xff) - 1 - T(CWL); in nv50_ram_timing_read()
/linux/include/uapi/drm/
A Dpanthor_drm.h148 DRM_IOCTL_PANTHOR(WR, DEV_QUERY, dev_query)
150 DRM_IOCTL_PANTHOR(WR, VM_CREATE, vm_create)
152 DRM_IOCTL_PANTHOR(WR, VM_DESTROY, vm_destroy)
154 DRM_IOCTL_PANTHOR(WR, VM_BIND, vm_bind)
156 DRM_IOCTL_PANTHOR(WR, VM_GET_STATE, vm_get_state)
158 DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create)
160 DRM_IOCTL_PANTHOR(WR, BO_MMAP_OFFSET, bo_mmap_offset)
162 DRM_IOCTL_PANTHOR(WR, GROUP_CREATE, group_create)
164 DRM_IOCTL_PANTHOR(WR, GROUP_DESTROY, group_destroy)
166 DRM_IOCTL_PANTHOR(WR, GROUP_SUBMIT, group_submit)
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
A Dadvantech,idk-2121wr.yaml7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
A Dadvantech,idk-1110wr.yaml7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel
/linux/arch/arm64/boot/dts/renesas/
A Dr8a774e1-hihope-rzg2h-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
A Dr8a774a1-hihope-rzg2m-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
A Dr8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts4 * Advantech IDK-1110WR 10.1" LVDS panel
A Dr8a774b1-hihope-rzg2n-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
A Dr8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
A Dr8a774c0-ek874-idk-2121wr.dts4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
/linux/Documentation/spi/
A Dspidev.rst122 return (RD) or assign (WR) the SPI transfer mode. Use the constants
131 which will return (RD) or assign (WR) the full SPI transfer mode,
136 which will return (RD) or assign (WR) the bit justification used to
144 a byte which will return (RD) or assign (WR) the number of bits in
149 u32 which will return (RD) or assign (WR) the maximum SPI transfer
/linux/Documentation/virt/kvm/x86/
A Derrata.rst55 MSRs, i.e. {RD,WR}MSR in the guest will behave as expected, but KVM does not
/linux/Documentation/devicetree/bindings/iio/resolver/
A Dadi,ad2s1210.yaml45 logic low and the WR/FSYNC line on the AD2S1210 should be connected to the
/linux/drivers/infiniband/ulp/rtrs/
A DREADME150 SEND_WITH_IMM WR, client When it recived new rkey message, it validates
193 SEND_WITH_IMM WR, client When it recived new rkey message, it validates

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