| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | mmhub_v9_4.c | 62 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_setup_hubid_vm_pt_regs() 67 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_setup_hubid_vm_pt_regs() 81 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs() 85 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs() 90 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs() 129 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() 133 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() 140 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() 145 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() 152 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() [all …]
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| A D | gfxhub_v2_1.c | 128 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_1_setup_vm_pt_regs() 132 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_1_setup_vm_pt_regs() 327 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() 329 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config() 333 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config() 336 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_setup_vmid_config() 350 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_1_program_invalidation() 352 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_1_program_invalidation() 393 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_1_gart_disable() 671 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_halt() [all …]
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| A D | gfxhub_v1_0.c | 45 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v1_0_setup_vm_pt_regs() 49 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v1_0_setup_vm_pt_regs() 295 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 297 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_setup_vmid_config() 299 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_setup_vmid_config() 301 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_setup_vmid_config() 304 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_setup_vmid_config() 316 WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v1_0_program_invalidation() 318 WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v1_0_program_invalidation() 349 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL, in gfxhub_v1_0_gart_disable()
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| A D | gfxhub_v2_0.c | 125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_0_setup_vm_pt_regs() 129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_0_setup_vm_pt_regs() 315 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 317 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config() 319 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config() 321 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config() 324 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config() 338 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_0_program_invalidation() 340 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_0_program_invalidation() 369 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_0_gart_disable()
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| A D | gfxhub_v3_0_3.c | 127 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v3_0_3_setup_vm_pt_regs() 131 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v3_0_3_setup_vm_pt_regs() 327 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 329 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_3_setup_vmid_config() 331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_3_setup_vmid_config() 333 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_3_setup_vmid_config() 336 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_3_setup_vmid_config() 350 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v3_0_3_program_invalidation() 352 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v3_0_3_program_invalidation() 381 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_gart_disable()
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| A D | gfxhub_v11_5_0.c | 129 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v11_5_0_setup_vm_pt_regs() 133 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v11_5_0_setup_vm_pt_regs() 325 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() 327 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v11_5_0_setup_vmid_config() 329 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v11_5_0_setup_vmid_config() 331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v11_5_0_setup_vmid_config() 334 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v11_5_0_setup_vmid_config() 348 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v11_5_0_program_invalidation() 350 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v11_5_0_program_invalidation() 391 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v11_5_0_gart_disable()
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| A D | gfxhub_v12_0.c | 132 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v12_0_setup_vm_pt_regs() 136 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v12_0_setup_vm_pt_regs() 330 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() 332 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v12_0_setup_vmid_config() 334 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v12_0_setup_vmid_config() 336 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v12_0_setup_vmid_config() 339 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v12_0_setup_vmid_config() 353 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v12_0_program_invalidation() 355 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v12_0_program_invalidation() 396 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v12_0_gart_disable()
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| A D | gfxhub_v3_0.c | 124 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v3_0_setup_vm_pt_regs() 128 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v3_0_setup_vm_pt_regs() 322 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 324 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_setup_vmid_config() 326 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_setup_vmid_config() 328 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_setup_vmid_config() 331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_setup_vmid_config() 345 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v3_0_program_invalidation() 347 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v3_0_program_invalidation() 388 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v3_0_gart_disable()
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| A D | mmhub_v3_0_2.c | 134 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_2_setup_vm_pt_regs() 138 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_2_setup_vm_pt_regs() 344 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 346 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_2_setup_vmid_config() 348 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_2_setup_vmid_config() 350 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_2_setup_vmid_config() 353 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_2_setup_vmid_config() 367 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_2_program_invalidation() 369 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_2_program_invalidation() 398 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_gart_disable()
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| A D | mmhub_v3_0_1.c | 143 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_1_setup_vm_pt_regs() 147 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_1_setup_vm_pt_regs() 339 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 341 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_1_setup_vmid_config() 343 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_1_setup_vmid_config() 345 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_1_setup_vmid_config() 348 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_1_setup_vmid_config() 362 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_1_program_invalidation() 364 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_1_program_invalidation() 393 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_gart_disable()
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| A D | mmhub_v3_0.c | 141 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_setup_vm_pt_regs() 145 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_setup_vm_pt_regs() 352 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 354 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_setup_vmid_config() 356 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_setup_vmid_config() 358 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_setup_vmid_config() 361 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_setup_vmid_config() 375 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_program_invalidation() 377 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_program_invalidation() 406 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_gart_disable()
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| A D | mmhub_v3_3.c | 138 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_3_setup_vm_pt_regs() 142 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_3_setup_vm_pt_regs() 336 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 338 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_3_setup_vmid_config() 340 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_3_setup_vmid_config() 342 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_3_setup_vmid_config() 345 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_3_setup_vmid_config() 359 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_3_program_invalidation() 361 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_3_program_invalidation() 439 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_3_gart_disable()
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| A D | mmhub_v4_1_0.c | 141 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v4_1_0_setup_vm_pt_regs() 145 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v4_1_0_setup_vm_pt_regs() 353 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 355 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v4_1_0_setup_vmid_config() 357 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v4_1_0_setup_vmid_config() 359 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v4_1_0_setup_vmid_config() 362 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v4_1_0_setup_vmid_config() 376 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v4_1_0_program_invalidation() 378 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v4_1_0_program_invalidation() 407 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v4_1_0_gart_disable()
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| A D | mmhub_v2_3.c | 126 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v2_3_setup_vm_pt_regs() 129 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v2_3_setup_vm_pt_regs() 314 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 316 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_3_setup_vmid_config() 318 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_3_setup_vmid_config() 320 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_3_setup_vmid_config() 323 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_3_setup_vmid_config() 337 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v2_3_program_invalidation() 340 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v2_3_program_invalidation() 382 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, in mmhub_v2_3_gart_disable()
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| A D | gfxhub_v1_2.c | 52 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs() 57 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs() 372 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 374 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config() 377 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config() 380 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config() 384 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config() 402 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v1_2_xcc_program_invalidation() 404 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v1_2_xcc_program_invalidation() 448 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_gart_disable()
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| A D | mmhub_v1_0.c | 59 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v1_0_setup_vm_pt_regs() 63 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_0_setup_vm_pt_regs() 273 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 275 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_0_setup_vmid_config() 277 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_0_setup_vmid_config() 279 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_0_setup_vmid_config() 282 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_0_setup_vmid_config() 294 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v1_0_program_invalidation() 296 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v1_0_program_invalidation() 349 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL, in mmhub_v1_0_gart_disable()
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| A D | mmhub_v1_8.c | 65 WREG32_SOC15_OFFSET(MMHUB, i, in mmhub_v1_8_setup_vm_pt_regs() 70 WREG32_SOC15_OFFSET(MMHUB, i, in mmhub_v1_8_setup_vm_pt_regs() 376 WREG32_SOC15_OFFSET(MMHUB, j, regVM_CONTEXT1_CNTL, in mmhub_v1_8_setup_vmid_config() 378 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_setup_vmid_config() 381 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_setup_vmid_config() 384 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_setup_vmid_config() 388 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_setup_vmid_config() 405 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_program_invalidation() 408 WREG32_SOC15_OFFSET(MMHUB, j, in mmhub_v1_8_program_invalidation() 442 WREG32_SOC15_OFFSET(MMHUB, j, regVM_CONTEXT0_CNTL, in mmhub_v1_8_gart_disable()
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| A D | nbio_v7_9.c | 104 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_1, in nbio_v7_9_sdma_doorbell_range() 121 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_2, in nbio_v7_9_sdma_doorbell_range() 138 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_3, in nbio_v7_9_sdma_doorbell_range() 155 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_4, in nbio_v7_9_sdma_doorbell_range() 213 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_17, in nbio_v7_9_vcn_doorbell_range() 225 WREG32_SOC15_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_17, in nbio_v7_9_vcn_doorbell_range()
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| A D | jpeg_v4_0_3.c | 341 WREG32_SOC15_OFFSET( in jpeg_v4_0_3_hw_init() 524 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 527 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 531 WREG32_SOC15_OFFSET( in jpeg_v4_0_3_start() 535 WREG32_SOC15_OFFSET( in jpeg_v4_0_3_start() 539 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 542 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 545 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 548 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v4_0_3_start() 656 WREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), in jpeg_v4_0_3_dec_ring_set_wptr()
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| A D | mmhub_v1_7.c | 59 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v1_7_setup_vm_pt_regs() 62 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_7_setup_vm_pt_regs() 305 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_CNTL, in mmhub_v1_7_setup_vmid_config() 307 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_7_setup_vmid_config() 309 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_7_setup_vmid_config() 311 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_7_setup_vmid_config() 314 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_7_setup_vmid_config() 326 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v1_7_program_invalidation() 328 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v1_7_program_invalidation() 357 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT0_CNTL, in mmhub_v1_7_gart_disable()
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| A D | soc15_common.h | 96 #define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \ macro
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| A D | gfx_v9_4_3.c | 1253 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_BASE, 2 * i, 0); in gfx_v9_4_3_xcc_init_compute_vmid() 1254 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * i, 0); in gfx_v9_4_3_xcc_init_compute_vmid() 1255 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, i, 0); in gfx_v9_4_3_xcc_init_compute_vmid() 1256 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, i, 0); in gfx_v9_4_3_xcc_init_compute_vmid() 1271 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid() 1272 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid() 1273 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid() 1274 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid()
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| A D | gfx_v11_0.c | 1899 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * i, 0); in gfx_v11_0_init_compute_vmid() 1900 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * i, 0); in gfx_v11_0_init_compute_vmid() 1901 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0); in gfx_v11_0_init_compute_vmid() 1902 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, i, 0); in gfx_v11_0_init_compute_vmid() 1917 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v11_0_init_gds_vmid() 1918 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v11_0_init_gds_vmid() 1919 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid() 1920 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid()
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| A D | gfx_v9_0.c | 2564 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v9_0_init_compute_vmid() 2565 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); in gfx_v9_0_init_compute_vmid() 2566 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v9_0_init_compute_vmid() 2567 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v9_0_init_compute_vmid() 2582 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v9_0_init_gds_vmid() 2583 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v9_0_init_gds_vmid() 2584 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid() 2585 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
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| A D | gfx_v10_0.c | 5071 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v10_0_init_compute_vmid() 5072 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); in gfx_v10_0_init_compute_vmid() 5073 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v10_0_init_compute_vmid() 5074 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v10_0_init_compute_vmid() 5092 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid() 5093 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid() 5094 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid() 5095 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
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