| /linux/drivers/net/ethernet/tehuti/ |
| A D | tehuti.c | 405 WRITE_REG(priv, regCTRLST, in bdx_hw_start()
408 WRITE_REG(priv, regVGLB, 0); in bdx_hw_start()
409 WRITE_REG(priv, regMAX_FRAME_A, in bdx_hw_start()
511 WRITE_REG(priv, regDIS_QU, 1); in bdx_sw_reset()
524 WRITE_REG(priv, regIMR, 0); in bdx_sw_reset()
528 WRITE_REG(priv, regRST_QU, 1); in bdx_sw_reset()
535 WRITE_REG(priv, i, 0); in bdx_sw_reset()
539 WRITE_REG(priv, regDIS_QU, 0); in bdx_sw_reset()
541 WRITE_REG(priv, regRST_QU, 0); in bdx_sw_reset()
720 WRITE_REG(priv, reg, val); in __bdx_vlan_rx_vid()
[all …]
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| A D | tehuti.h | 98 #define WRITE_REG(pp, reg, val) writel(val, pp->pBdxRegs + reg) macro
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| /linux/drivers/parisc/ |
| A D | sba_iommu.c | 140 #define WRITE_REG(value, addr) WRITE_REG64(value, addr) macro
143 #define WRITE_REG(value, addr) WRITE_REG32(value, addr) macro
1337 WRITE_REG(ioc->imask, ioc->ioc_hpa + IOC_IMASK); in sba_ioc_init_pluto()
1358 WRITE_REG(tcnfg, ioc->ioc_hpa + IOC_TCNFG); in sba_ioc_init_pluto()
1486 WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE); in sba_ioc_init()
1487 WRITE_REG(ioc->imask, ioc->ioc_hpa+IOC_IMASK); in sba_ioc_init()
1501 WRITE_REG(tcnfg, ioc->ioc_hpa+IOC_TCNFG); in sba_ioc_init()
1507 WRITE_REG(0 | 31, ioc->ioc_hpa+IOC_PCOM); in sba_ioc_init()
1591 WRITE_REG(ioc_ctl, sba_dev->sba_hpa+IOC_CTRL); in sba_hw_init()
1657 WRITE_REG(cfg_val, rope_cfg); in sba_hw_init()
[all …]
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| A D | lba_pci.c | 932 WRITE_REG##size(val, astro_iop_base + addr); \
990 WRITE_REG##size(val, where); \
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| /linux/drivers/ata/ |
| A D | pata_opti.c | 40 WRITE_REG = 1, /* index of Write cycle timing register */ enumerator
144 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG); in opti_set_piomode()
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| A D | pata_optidma.c | 39 WRITE_REG = 1, /* index of Write cycle timing register */ enumerator
170 iowrite8(data_rec_timing[pci_clock][pio], regio + WRITE_REG); in optidma_mode_setup()
173 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + WRITE_REG); in optidma_mode_setup()
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| /linux/drivers/gpu/drm/amd/include/ |
| A D | mes_v11_api_def.h | 571 struct WRITE_REG { struct
627 struct WRITE_REG write_reg;
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| A D | mes_v12_api_def.h | 652 struct WRITE_REG { struct
722 struct WRITE_REG write_reg;
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| /linux/drivers/staging/rts5208/ |
| A D | ms.h | 40 #define WRITE_REG 0x0B macro
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| A D | ms.c | 728 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, in ms_switch_parallel_bus()
748 retval = ms_write_bytes(chip, WRITE_REG, 1, in ms_switch_8bit_bus()
1277 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1361 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1691 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1799 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1847 retval = ms_write_bytes(chip, WRITE_REG, 7,
2073 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2990 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3152 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
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| /linux/drivers/staging/rtl8712/ |
| A D | rtl871x_mp_ioctl.h | 208 GEN_MP_IOCTL_SUBCODE(WRITE_REG),
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| /linux/drivers/staging/rtl8723bs/include/ |
| A D | rtw_mp.h | 155 WRITE_REG = 1, enumerator
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