| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 357 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges() 362 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn316_build_watermark_ranges() 365 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn316_build_watermark_ranges() 368 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn316_build_watermark_ranges() 385 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in dcn316_build_watermark_ranges() 386 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in dcn316_build_watermark_ranges() 391 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn316_build_watermark_ranges() 392 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn316_build_watermark_ranges() 393 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges() 394 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn316_build_watermark_ranges() [all …]
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| A D | dcn316_smu.h | 98 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 400 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges() 405 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in vg_build_watermark_ranges() 408 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in vg_build_watermark_ranges() 411 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in vg_build_watermark_ranges() 428 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in vg_build_watermark_ranges() 429 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in vg_build_watermark_ranges() 434 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in vg_build_watermark_ranges() 435 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in vg_build_watermark_ranges() 436 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in vg_build_watermark_ranges() 437 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in vg_build_watermark_ranges() [all …]
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| A D | dcn301_smu.h | 77 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member 131 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 435 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges() 440 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn31_build_watermark_ranges() 443 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn31_build_watermark_ranges() 446 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn31_build_watermark_ranges() 463 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in dcn31_build_watermark_ranges() 464 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in dcn31_build_watermark_ranges() 469 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn31_build_watermark_ranges() 470 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn31_build_watermark_ranges() 471 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges() 472 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn31_build_watermark_ranges() [all …]
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| A D | dcn31_smu.h | 74 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member 231 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 395 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges() 400 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn315_build_watermark_ranges() 403 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn315_build_watermark_ranges() 406 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn315_build_watermark_ranges() 423 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in dcn315_build_watermark_ranges() 424 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in dcn315_build_watermark_ranges() 429 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn315_build_watermark_ranges() 430 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn315_build_watermark_ranges() 431 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges() 432 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn315_build_watermark_ranges() [all …]
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| A D | dcn315_smu.h | 90 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 500 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn314_build_watermark_ranges() 505 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn314_build_watermark_ranges() 508 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn314_build_watermark_ranges() 511 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn314_build_watermark_ranges() 528 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in dcn314_build_watermark_ranges() 529 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in dcn314_build_watermark_ranges() 534 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn314_build_watermark_ranges() 535 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn314_build_watermark_ranges() 536 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges() 537 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn314_build_watermark_ranges() [all …]
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| A D | dcn314_smu.h | 72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 656 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn35_build_watermark_ranges() 661 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn35_build_watermark_ranges() 664 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn35_build_watermark_ranges() 667 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn35_build_watermark_ranges() 684 table->WatermarkRow[WM_DCFCLK][0].MinMclk = 0; in dcn35_build_watermark_ranges() 685 table->WatermarkRow[WM_DCFCLK][0].MinClock = 0; in dcn35_build_watermark_ranges() 690 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn35_build_watermark_ranges() 691 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn35_build_watermark_ranges() 692 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn35_build_watermark_ranges() 693 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn35_build_watermark_ranges() [all …]
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| A D | dcn35_smu.h | 71 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member 156 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | smu_helper.c | 728 table->WatermarkRow[1][i].MinClock = in smu_set_watermarks_for_clocks_ranges() 732 table->WatermarkRow[1][i].MaxClock = in smu_set_watermarks_for_clocks_ranges() 736 table->WatermarkRow[1][i].MinUclk = in smu_set_watermarks_for_clocks_ranges() 740 table->WatermarkRow[1][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges() 744 table->WatermarkRow[1][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges() 749 table->WatermarkRow[0][i].MinClock = in smu_set_watermarks_for_clocks_ranges() 753 table->WatermarkRow[0][i].MaxClock = in smu_set_watermarks_for_clocks_ranges() 757 table->WatermarkRow[0][i].MinUclk = in smu_set_watermarks_for_clocks_ranges() 761 table->WatermarkRow[0][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges() 765 table->WatermarkRow[0][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_5_ppt.c | 422 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table() 424 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table() 426 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table() 428 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table() 431 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table() 436 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table() 438 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table() 440 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table() 442 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table() 445 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
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| A D | smu_v13_0_4_ppt.c | 678 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table() 680 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table() 682 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table() 684 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table() 687 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table() 692 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table() 694 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table() 696 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table() 698 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table() 701 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
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| A D | yellow_carp_ppt.c | 513 table->WatermarkRow[WM_DCFCLK][i].MinClock = in yellow_carp_set_watermarks_table() 515 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in yellow_carp_set_watermarks_table() 517 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in yellow_carp_set_watermarks_table() 519 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in yellow_carp_set_watermarks_table() 522 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in yellow_carp_set_watermarks_table() 527 table->WatermarkRow[WM_SOCCLK][i].MinClock = in yellow_carp_set_watermarks_table() 529 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in yellow_carp_set_watermarks_table() 531 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in yellow_carp_set_watermarks_table() 533 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in yellow_carp_set_watermarks_table() 536 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 341 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges() 342 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges() 343 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges() 344 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges() 345 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].WmSetting = i; in dcn3_notify_wm_ranges() 346 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries… in dcn3_notify_wm_ranges()
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| A D | dcn30_smu11_driver_if.h | 53 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| A D | renoir_ppt.c | 1094 table->WatermarkRow[WM_DCFCLK][i].MinClock = in renoir_set_watermarks_table() 1096 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in renoir_set_watermarks_table() 1098 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in renoir_set_watermarks_table() 1100 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in renoir_set_watermarks_table() 1103 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in renoir_set_watermarks_table() 1105 table->WatermarkRow[WM_DCFCLK][i].WmType = in renoir_set_watermarks_table() 1110 table->WatermarkRow[WM_SOCCLK][i].MinClock = in renoir_set_watermarks_table() 1112 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in renoir_set_watermarks_table() 1114 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in renoir_set_watermarks_table() 1116 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in renoir_set_watermarks_table() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_smu14_driver_if.h | 43 WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| A D | dcn32_smu13_driver_if.h | 42 WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0_0_ppt.c | 497 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v14_0_0_set_watermarks_table() 499 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v14_0_0_set_watermarks_table() 501 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v14_0_0_set_watermarks_table() 503 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v14_0_0_set_watermarks_table() 506 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v14_0_0_set_watermarks_table() 511 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v14_0_0_set_watermarks_table() 513 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v14_0_0_set_watermarks_table() 515 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v14_0_0_set_watermarks_table() 517 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v14_0_0_set_watermarks_table() 520 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v14_0_0_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | smu10_driver_if.h | 70 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| A D | smu13_driver_if_v13_0_5.h | 73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | vangogh_ppt.c | 1625 table->WatermarkRow[WM_DCFCLK][i].MinClock = in vangogh_set_watermarks_table() 1627 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in vangogh_set_watermarks_table() 1629 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in vangogh_set_watermarks_table() 1631 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in vangogh_set_watermarks_table() 1634 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in vangogh_set_watermarks_table() 1639 table->WatermarkRow[WM_SOCCLK][i].MinClock = in vangogh_set_watermarks_table() 1641 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in vangogh_set_watermarks_table() 1643 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in vangogh_set_watermarks_table() 1645 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in vangogh_set_watermarks_table() 1648 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in vangogh_set_watermarks_table()
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