Searched refs:__TLBI_VADDR (Results 1 – 4 of 4) sorted by relevance
| /linux/arch/arm64/include/asm/ |
| A D | tlbflush.h | 58 #define __TLBI_VADDR(addr, asid) \ macro 278 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm() 291 addr = __TLBI_VADDR(uaddr, ASID(mm)); in __flush_tlb_page_nosync() 408 addr = __TLBI_VADDR(start, asid); \ 502 start = __TLBI_VADDR(start, 0); in flush_tlb_kernel_range() 503 end = __TLBI_VADDR(end, 0); in flush_tlb_kernel_range() 518 unsigned long addr = __TLBI_VADDR(kaddr, 0); in __flush_tlb_kernel_pgtable()
|
| /linux/arch/arm64/kernel/ |
| A D | sys_compat.c | 39 __tlbi(aside1is, __TLBI_VADDR(0, 0)); in __do_compat_cache_op()
|
| /linux/arch/arm64/kvm/hyp/nvhe/ |
| A D | mm.c | 263 __tlbi_level(vale2is, __TLBI_VADDR(addr, 0), KVM_PGTABLE_LAST_LEVEL); in fixmap_clear_slot()
|
| /linux/arch/arm64/kvm/hyp/ |
| A D | pgtable.c | 489 __tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN); in hyp_unmap_walker() 496 __tlbi_level(vale2is, __TLBI_VADDR(ctx->addr, 0), ctx->level); in hyp_unmap_walker()
|
Completed in 11 milliseconds