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/linux/Documentation/gpu/amdgpu/display/
A Ddisplay-manager.rst105 - *plane_alpha*: Plane alpha value set by the **plane "alpha" property**, see
108 in the basic alpha blending equation::
110 out.rgb = alpha * fg.rgb + (1 - alpha) * bg.rgb
113 alpha affects the resulted pixel color values.
123 pre-multiplied with the alpha channel values.
143 alpha and plane alpha values. It sets one of the three modes for
152 * *MPC pixel alpha* matches *DRM fg.alpha* as the alpha component value
154 * *MPC global alpha* matches *DRM plane_alpha* when the pixel alpha should
159 In short, *fg.alpha* is ignored by selecting
161 fg.alpha) component becomes available by selecting
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/linux/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/
A Dia_css_xnr3.host.c80 s32 alpha; in compute_alpha() local
84 alpha = XNR_MAX_ALPHA; in compute_alpha()
88 if (alpha > XNR_MAX_ALPHA) in compute_alpha()
89 alpha = XNR_MAX_ALPHA; in compute_alpha()
92 return alpha; in compute_alpha()
168 to->alpha.y0 = alpha_y0; in ia_css_xnr3_encode()
169 to->alpha.u0 = alpha_u0; in ia_css_xnr3_encode()
170 to->alpha.v0 = alpha_v0; in ia_css_xnr3_encode()
171 to->alpha.ydiff = clamp(alpha_ydiff, min_diff, max_diff); in ia_css_xnr3_encode()
172 to->alpha.udiff = clamp(alpha_udiff, min_diff, max_diff); in ia_css_xnr3_encode()
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/linux/Documentation/devicetree/bindings/iio/afe/
A Dtemperature-sense-rtd.yaml24 R(T) = r0 * (1 + alpha * T)
25 T = 1 / (alpha * r0 * iexc) * (V - r0 * iexc)
62 alpha-ppm-per-celsius:
64 alpha can also be expressed in micro-ohms per ohm Celsius. It's a linear
68 alpha = (R_100 - R_0) / (100 * R_0)
74 Pure platinum has an alpha of 3925. Industry standards such as IEC60751
75 and ASTM E-1137 specify an alpha of 3850.
87 - alpha-ppm-per-celsius
98 alpha-ppm-per-celsius = <3908>;
A Dtemperature-transducer.yaml26 T = (Isense(T) / alpha) + offset
27 T = 1 / (Rsense * alpha) * (V + offset * Rsense * alpha)
78 alpha-ppm-per-celsius:
82 alpha is expressed in parts per million which can be micro-amps per
92 - alpha-ppm-per-celsius
103 alpha-ppm-per-celsius = <1>; /* 1 uA/K */
112 alpha-ppm-per-celsius = <4000>; /* 4 mV/K */
/linux/net/ipv4/
A Dtcp_illinois.c50 u32 alpha; /* Additive increase */ member
73 ca->alpha = ALPHA_MAX; in tcp_illinois_init()
140 static u32 alpha(struct illinois *ca, u32 da, u32 dm) in alpha() function
153 return ca->alpha; in alpha()
228 ca->alpha = ALPHA_BASE; in update_params()
234 ca->alpha = alpha(ca, da, dm); in update_params()
249 ca->alpha = ALPHA_BASE; in tcp_illinois_state()
286 delta = (tp->snd_cwnd_cnt * ca->alpha) >> ALPHA_SHIFT; in tcp_illinois_cong_avoid()
A Dtcp_dctcp.c136 u32 alpha = ca->dctcp_alpha; in dctcp_update_alpha() local
154 alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g); in dctcp_update_alpha()
163 alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA); in dctcp_update_alpha()
169 WRITE_ONCE(ca->dctcp_alpha, alpha); in dctcp_update_alpha()
A Dtcp_htcp.c27 u32 alpha; /* Fixed point arith, << 7 */ member
127 if (ca->packetcount >= tcp_snd_cwnd(tp) - (ca->alpha >> 7 ? : 1) && in measure_achieved_throughput()
194 ca->alpha = 2 * factor * ((1 << 7) - ca->beta); in htcp_alpha_update()
195 if (!ca->alpha) in htcp_alpha_update()
196 ca->alpha = ALPHA_BASE; in htcp_alpha_update()
245 if ((tp->snd_cwnd_cnt * ca->alpha)>>7 >= tcp_snd_cwnd(tp)) { in htcp_cong_avoid()
262 ca->alpha = ALPHA_BASE; in htcp_init()
A Dtcp_vegas.c44 static int alpha = 2; variable
48 module_param(alpha, int, 0644);
49 MODULE_PARM_DESC(alpha, "lower bound of packets in network");
261 } else if (diff < alpha) { in tcp_vegas_cong_avoid()
/linux/drivers/gpu/drm/imx/dcss/
A Ddcss-dtg.c91 u32 alpha; member
172 dtg->alpha = 255; in dcss_dtg_init()
175 ((dtg->alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK); in dcss_dtg_init()
264 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha) in dcss_dtg_global_alpha_changed() argument
269 return alpha != dtg->alpha; in dcss_dtg_global_alpha_changed()
273 const struct drm_format_info *format, int alpha) in dcss_dtg_plane_alpha_set() argument
283 if (!format->has_alpha || alpha != 255) in dcss_dtg_plane_alpha_set()
284 dtg->alpha_cfg = (alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK; in dcss_dtg_plane_alpha_set()
288 dtg->alpha = alpha; in dcss_dtg_plane_alpha_set()
/linux/drivers/gpu/drm/rockchip/
A Drockchip_drm_vop2.c2082 static bool is_opaque(u16 alpha) in is_opaque() argument
2084 return (alpha >> 8) == 0xff; in is_opaque()
2097 alpha->src_color_ctrl.val = 0; in vop2_parse_alpha()
2098 alpha->dst_color_ctrl.val = 0; in vop2_parse_alpha()
2099 alpha->src_alpha_ctrl.val = 0; in vop2_parse_alpha()
2100 alpha->dst_alpha_ctrl.val = 0; in vop2_parse_alpha()
2133 alpha->src_alpha_ctrl.bits.blend_mode = alpha->src_color_ctrl.bits.blend_mode; in vop2_parse_alpha()
2164 struct vop2_alpha alpha; in vop2_setup_cluster_alpha() local
2189 alpha.src_color_ctrl.val); in vop2_setup_cluster_alpha()
2191 alpha.dst_color_ctrl.val); in vop2_setup_cluster_alpha()
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/linux/tools/testing/selftests/bpf/progs/
A Dbpf_dctcp.c133 __u32 alpha = ca->dctcp_alpha; in BPF_PROG() local
137 alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g); in BPF_PROG()
147 alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA); in BPF_PROG()
149 ca->dctcp_alpha = alpha; in BPF_PROG()
/linux/Documentation/userspace-api/media/v4l/
A Dvidioc-g-fbuf.rst232 - The device supports alpha blending using a global alpha value.
236 - The device supports clipping/blending using the inverted alpha
289 - Use the alpha channel of the framebuffer to clip or blend
291 output = framebuffer pixel * alpha + video pixel * (1 - alpha).
292 The actual alpha depth depends on the framebuffer pixel format.
295 - Use a global alpha value to blend the framebuffer with video
296 images. The blend function is: output = (framebuffer pixel * alpha
297 + video pixel * (255 - alpha)) / 255. The alpha value is
306 but with an inverted alpha value. The blend function is: output =
307 framebuffer pixel * (1 - alpha) + video pixel * alpha. The actual
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A Dpixfmt-rgb.rst17 presence of an alpha component or additional padding bits.
19 The usage and value of the alpha bits in formats that support them (named ARGB
20 or a permutation thereof, collectively referred to as alpha formats) depend on
22 (including capture queues of mem-to-mem devices) fill the alpha component in
23 memory. When the device captures an alpha channel the alpha component will have
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
27 specify that alpha value, and the alpha component of all pixels will be set to
29 an alpha component (XRGB or XBGR) must be used instead of an alpha format.
33 memory. When the device processes the alpha channel the alpha component must be
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/linux/kernel/bpf/
A Dtnum.c76 u64 dv, alpha, beta, chi, mu; in tnum_sub() local
79 alpha = dv + a.mask; in tnum_sub()
81 chi = alpha ^ beta; in tnum_sub()
88 u64 alpha, beta, v; in tnum_and() local
90 alpha = a.value | a.mask; in tnum_and()
93 return TNUM(v, alpha & beta & ~v); in tnum_and()
/linux/arch/alpha/
A DMakefile35 libs-y += arch/alpha/lib/
41 boot := arch/alpha/boot
53 $(Q)$(MAKE) $(build)=arch/alpha/kernel/syscalls all
/linux/Documentation/translations/zh_CN/mm/
A Dactive_mm.rst81 变了接口以适配alpha（谁会想到呢，但alpha体系结构上下文切换代码实际上最终是
82 最丑陋的之一--不像其他架构的MM和寄存器状态是分开的，alpha的PALcode将两者
/linux/drivers/gpu/drm/fsl-dcu/
A Dfsl_dcu_drm_plane.c88 unsigned int alpha = DCU_LAYER_AB_NONE, bpp; in fsl_dcu_drm_plane_atomic_update() local
108 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
114 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
120 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
144 alpha); in fsl_dcu_drm_plane_atomic_update()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dctxgp102.c44 const u32 alpha = grctx->alpha_nr; in gp102_grctx_generate_attrib() local
54 gf100_grctx_patch_wr32(chan, 0x40585c, alpha); in gp102_grctx_generate_attrib()
55 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gp102_grctx_generate_attrib()
59 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
A Dctxgf108.c740 const u32 alpha = grctx->alpha_nr; in gf108_grctx_generate_attrib() local
748 gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha); in gf108_grctx_generate_attrib()
749 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gf108_grctx_generate_attrib()
753 const u32 a = alpha; in gf108_grctx_generate_attrib()
A Dctxgp100.c46 const u32 alpha = grctx->alpha_nr; in gp100_grctx_generate_attrib() local
55 gf100_grctx_patch_wr32(chan, 0x40585c, alpha); in gp100_grctx_generate_attrib()
56 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gp100_grctx_generate_attrib()
60 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
A Dctxgf117.c248 const u32 alpha = grctx->alpha_nr; in gf117_grctx_generate_attrib() local
256 gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha); in gf117_grctx_generate_attrib()
257 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gf117_grctx_generate_attrib()
261 const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
/linux/drivers/gpu/drm/logicvc/
A Dlogicvc_layer.c64 .alpha = true,
194 u32 alpha; in logicvc_plane_atomic_update() local
213 alpha = new_state->alpha * alpha_max / DRM_BLEND_ALPHA_OPAQUE; in logicvc_plane_atomic_update()
216 alpha, alpha_max); in logicvc_plane_atomic_update()
219 alpha); in logicvc_plane_atomic_update()
355 bool alpha; in logicvc_layer_formats_lookup() local
358 alpha = (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_PIXEL); in logicvc_layer_formats_lookup()
363 logicvc_layer_formats[i].alpha == alpha) in logicvc_layer_formats_lookup()
/linux/drivers/gpu/drm/tegra/
A Dplane.c554 unsigned int *alpha) in tegra_plane_format_get_alpha() argument
557 *alpha = opaque; in tegra_plane_format_get_alpha()
563 *alpha = WIN_COLOR_DEPTH_B5G5R5A1; in tegra_plane_format_get_alpha()
567 *alpha = WIN_COLOR_DEPTH_A1B5G5R5; in tegra_plane_format_get_alpha()
571 *alpha = WIN_COLOR_DEPTH_R8G8B8A8; in tegra_plane_format_get_alpha()
575 *alpha = WIN_COLOR_DEPTH_B8G8R8A8; in tegra_plane_format_get_alpha()
579 *alpha = opaque; in tegra_plane_format_get_alpha()
685 state->blending[index].alpha = true; in tegra_plane_update_transparency()
687 state->blending[index].alpha = false; in tegra_plane_update_transparency()
/linux/drivers/gpu/drm/ci/xfails/
A Di915-apl-fails.txt28 kms_plane_alpha_blend@alpha-basic,Fail
29 kms_plane_alpha_blend@alpha-opaque-fb,Fail
30 kms_plane_alpha_blend@alpha-transparent-fb,Fail
31 kms_plane_alpha_blend@constant-alpha-max,Fail
/linux/net/sched/
A Dsch_pie.c176 WRITE_ONCE(q->params.alpha, nla_get_u32(tb[TCA_PIE_ALPHA])); in pie_change()
306 u64 alpha, beta; in pie_calculate_probability() local
336 alpha = ((u64)params->alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 4; in pie_calculate_probability()
343 alpha >>= 1; in pie_calculate_probability()
349 alpha >>= 2; in pie_calculate_probability()
356 delta += alpha * (qdelay - params->target); in pie_calculate_probability()
479 nla_put_u32(skb, TCA_PIE_ALPHA, READ_ONCE(q->params.alpha)) || in pie_dump()

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