| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| A D | dc_common.c | 56 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_lower_pipe_tree_visible() 76 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_pipe_tree_visible()
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| A D | dce_calcs.c | 2803 if (!pipe[i].stream || !pipe[i].bottom_pipe) in populate_initial_data() 2880 …data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.v… in populate_initial_data() 2881 …data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.vi… in populate_initial_data() 2883 pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch); in populate_initial_data() 2884 …data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data() 2885 …data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data() 2887 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value); in populate_initial_data() 2889 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); in populate_initial_data() 2890 switch (pipe[i].bottom_pipe->plane_state->rotation) { in populate_initial_data() 2915 if (!pipe[i].stream || pipe[i].bottom_pipe) in populate_initial_data()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 1553 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe->next_odm_pipe; in dcn30_split_stream_for_mpc_or_odm() 1571 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe; in dcn30_split_stream_for_mpc_or_odm() 1749 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn30_internal_validate_bw() local 1751 top_pipe->bottom_pipe = bottom_pipe; in dcn30_internal_validate_bw() 1752 if (bottom_pipe) in dcn30_internal_validate_bw() 1790 if (split[i] == 4 && old_pipe->bottom_pipe && old_pipe->bottom_pipe->bottom_pipe && in dcn30_internal_validate_bw() 1792 old_index = old_pipe->bottom_pipe->bottom_pipe->pipe_idx; in dcn30_internal_validate_bw() 1833 else if (!odm && old_pipe->bottom_pipe && old_pipe->bottom_pipe->bottom_pipe && in dcn30_internal_validate_bw() 1834 old_pipe->bottom_pipe->bottom_pipe->bottom_pipe && in dcn30_internal_validate_bw() 1835 old_pipe->bottom_pipe->bottom_pipe->bottom_pipe->plane_state == old_pipe->plane_state) in dcn30_internal_validate_bw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 1921 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe; in dcn32_split_stream_for_mpc_or_odm() 1980 pipe->prev_odm_pipe->bottom_pipe->bottom_pipe = pipe->bottom_pipe; in dcn32_apply_merge_split_flags_helper() 1984 pipe->prev_odm_pipe->bottom_pipe = pipe->bottom_pipe; in dcn32_apply_merge_split_flags_helper() 2009 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn32_apply_merge_split_flags_helper() local 2011 top_pipe->bottom_pipe = bottom_pipe; in dcn32_apply_merge_split_flags_helper() 2051 if (split[i] == 4 && old_pipe->bottom_pipe && old_pipe->bottom_pipe->bottom_pipe && in dcn32_apply_merge_split_flags_helper() 2053 old_index = old_pipe->bottom_pipe->bottom_pipe->pipe_idx; in dcn32_apply_merge_split_flags_helper() 2094 else if (!odm && old_pipe->bottom_pipe && old_pipe->bottom_pipe->bottom_pipe && in dcn32_apply_merge_split_flags_helper() 2095 old_pipe->bottom_pipe->bottom_pipe->bottom_pipe && in dcn32_apply_merge_split_flags_helper() 2096 old_pipe->bottom_pipe->bottom_pipe->bottom_pipe->plane_state == old_pipe->plane_state) in dcn32_apply_merge_split_flags_helper() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_mall_phantom.c | 118 pipe->bottom_pipe = NULL; in merge_pipes_for_subvp() 130 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in merge_pipes_for_subvp() local 132 top_pipe->bottom_pipe = bottom_pipe; in merge_pipes_for_subvp() 133 if (bottom_pipe) in merge_pipes_for_subvp() 134 bottom_pipe->top_pipe = top_pipe; in merge_pipes_for_subvp() 137 pipe->bottom_pipe = NULL; in merge_pipes_for_subvp() 197 pipe = pipe->bottom_pipe; in get_num_free_pipes() 260 pipe = pipe->bottom_pipe; in assign_subvp_pipe() 324 pipe = pipe->bottom_pipe; in enough_pipes_for_subvp() 779 curr_pipe = curr_pipe->bottom_pipe; in enable_phantom_plane()
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| A D | dml2_dc_resource_mgmt.c | 164 mpc_pipe = mpc_pipe->bottom_pipe; in find_pipes_assigned_to_plane() 569 …top_pipe->bottom_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree() 574 state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]].bottom_pipe = NULL; in add_plane_to_blend_tree() 726 pipe->top_pipe->bottom_pipe = pipe->bottom_pipe; in remove_pipes_from_blend_trees() 728 if (pipe->bottom_pipe) in remove_pipes_from_blend_trees() 729 pipe->bottom_pipe = pipe->top_pipe; in remove_pipes_from_blend_trees()
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| A D | dml2_translation_helper.c | 1194 pipe = pipe->bottom_pipe; in dml2_populate_pipe_to_plane_index_mapping()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 1947 pipe = pipe->bottom_pipe; in resource_get_dpp_pipes_for_opp_head() 1977 pipe = pipe->bottom_pipe; in resource_get_dpp_pipes_for_plane() 2180 if (pipe_a->bottom_pipe && pipe_b->bottom_pipe) { in resource_is_pipe_topology_changed() 2181 if (pipe_a->bottom_pipe->pipe_idx != pipe_b->bottom_pipe->pipe_idx) in resource_is_pipe_topology_changed() 2189 } else if (pipe_a->bottom_pipe || pipe_b->bottom_pipe) { in resource_is_pipe_topology_changed() 2474 split_pipe->top_pipe->bottom_pipe = split_pipe->bottom_pipe; in acquire_first_split_pipe() 2475 if (split_pipe->bottom_pipe) in acquire_first_split_pipe() 2786 sec_pipe->bottom_pipe = NULL; in acquire_secondary_dpp_pipes_and_add_plane() 2838 pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe; in resource_remove_dpp_pipes_for_plane_composition() 3051 new_dpp_pipe->bottom_pipe = last_dpp_pipe->bottom_pipe; in acquire_dpp_pipe_and_add_mpc_slice() [all …]
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| A D | dc_hw_sequencer.c | 724 current_mpc_pipe = current_mpc_pipe->bottom_pipe; in hwss_build_fast_sequence() 757 if (!current_mpc_pipe->bottom_pipe && !current_mpc_pipe->next_odm_pipe && in hwss_build_fast_sequence() 765 current_mpc_pipe = current_mpc_pipe->bottom_pipe; in hwss_build_fast_sequence() 969 while (bottom_pipe_ctx->bottom_pipe != NULL) in get_surface_tile_visual_confirm_color() 970 bottom_pipe_ctx = bottom_pipe_ctx->bottom_pipe; in get_surface_tile_visual_confirm_color()
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| A D | dc_state.c | 156 if (cur_pipe->bottom_pipe) in dc_state_copy_internal() 157 cur_pipe->bottom_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_state_copy_internal()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1505 if (prev_odm_pipe->bottom_pipe && prev_odm_pipe->bottom_pipe->next_odm_pipe) { in dcn20_split_stream_for_odm() 1507 next_odm_pipe->bottom_pipe = prev_odm_pipe->bottom_pipe->next_odm_pipe; in dcn20_split_stream_for_odm() 1572 secondary_pipe->bottom_pipe = sec_bot_pipe; in dcn20_split_stream_for_mpc() 1582 if (primary_pipe->bottom_pipe && primary_pipe->bottom_pipe != secondary_pipe) { in dcn20_split_stream_for_mpc() 1583 ASSERT(!secondary_pipe->bottom_pipe); in dcn20_split_stream_for_mpc() 1584 secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; in dcn20_split_stream_for_mpc() 1806 odm_pipe->bottom_pipe = NULL; in dcn20_merge_pipes_for_validate() 1828 pipe->bottom_pipe = hsplit_pipe->bottom_pipe; in dcn20_merge_pipes_for_validate() 1829 if (hsplit_pipe->bottom_pipe) in dcn20_merge_pipes_for_validate() 1834 hsplit_pipe->bottom_pipe = NULL; in dcn20_merge_pipes_for_validate() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 314 } else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params() 542 if (primary_pipe->bottom_pipe) { in split_stream_across_pipes() 543 ASSERT(primary_pipe->bottom_pipe != secondary_pipe); in split_stream_across_pipes() 544 secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; in split_stream_across_pipes() 547 primary_pipe->bottom_pipe = secondary_pipe; in split_stream_across_pipes() 946 if (pipe->bottom_pipe && pipe->bottom_pipe->plane_state == pipe->plane_state) { in dcn_validate_bandwidth() 1235 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn_validate_bandwidth() 1269 pipe->bottom_pipe = hsplit_pipe->bottom_pipe; in dcn_validate_bandwidth() 1270 if (hsplit_pipe->bottom_pipe) in dcn_validate_bandwidth() 1271 hsplit_pipe->bottom_pipe->top_pipe = pipe; in dcn_validate_bandwidth() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource_helpers.c | 125 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp() 137 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn32_merge_pipes_for_subvp() local 139 top_pipe->bottom_pipe = bottom_pipe; in dcn32_merge_pipes_for_subvp() 140 if (bottom_pipe) in dcn32_merge_pipes_for_subvp() 141 bottom_pipe->top_pipe = top_pipe; in dcn32_merge_pipes_for_subvp() 144 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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| A D | dcn32_resource.c | 1678 curr_pipe = curr_pipe->bottom_pipe; in dcn32_enable_phantom_plane() 2641 if ((old_primary_pipe->next_odm_pipe) && (old_primary_pipe->next_odm_pipe->bottom_pipe) in find_idle_secondary_pipe_check_mpo() 2642 && (!primary_pipe->bottom_pipe)) in find_idle_secondary_pipe_check_mpo() 2643 next_odm_mpo_pipe = old_primary_pipe->next_odm_pipe->bottom_pipe; in find_idle_secondary_pipe_check_mpo() 2694 if (pipe->bottom_pipe && res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx].stream == NULL) { in dcn32_acquire_idle_pipe_for_head_pipe_in_layer() 2695 idle_pipe = &res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx]; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer() 2696 idle_pipe->pipe_idx = pipe->bottom_pipe->pipe_idx; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 726 pipe_ctx->bottom_pipe = NULL; in dcn20_plane_atomic_disable() 1388 temp_pipe = pipe->bottom_pipe; in dcn20_pipe_control_lock() 1392 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock() 1413 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock() 1420 if (lock && (pipe->bottom_pipe != NULL || !flip_immediate)) in dcn20_pipe_control_lock() 1428 temp_pipe = pipe->bottom_pipe; in dcn20_pipe_control_lock() 1432 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock() 1845 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in calculate_vready_offset_for_group() 2144 pipe = pipe->bottom_pipe; in dcn20_program_front_end_for_ctx() 2290 pipe = pipe->bottom_pipe; in dcn20_post_unlock_program_front_end()
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_hw_sequencer.c | 312 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce60_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 450 struct pipe_ctx *bottom_pipe; member
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 818 if (subvp_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info() 819 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->bottom_pipe->pipe_idx; in populate_subvp_cmd_pipe_info() 833 if (phantom_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info() 834 …pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->bottom_pipe->plane_res.… in populate_subvp_cmd_pipe_info()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 1692 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_apply_single_controller_ctx_to_hw() 2558 if (pipe_ctx->bottom_pipe) { in program_surface_visibility() 2561 ASSERT(pipe_ctx->bottom_pipe->bottom_pipe == NULL); in program_surface_visibility() 2563 if (pipe_ctx->bottom_pipe->plane_state->visible) { in program_surface_visibility() 2917 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 941 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in calculate_vready_offset_for_group() 1333 pipe_ctx->bottom_pipe = NULL; in dcn10_plane_atomic_disable() 2679 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn10_update_mpcc() 2756 pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in update_scaler() 3503 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn10_set_cursor_position() 3643 if (pipe_ctx->bottom_pipe) { in dcn10_set_cursor_position() 3645 pipe_ctx->bottom_pipe->plane_res.scl_data.viewport.y; in dcn10_set_cursor_position()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 1129 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn401_set_cursor_position() 1213 (pipe_ctx == pipe_ctx->top_pipe->bottom_pipe)) { in dcn401_set_cursor_position() 1389 pipe_ctx = pipe_ctx->bottom_pipe; in dcn401_wait_for_dcc_meta_propagation()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| A D | dcn201_hwseq.c | 426 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn201_update_mpcc()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 824 struct pipe_ctx *mpo_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw() 848 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | dcn20_fpu.c | 1593 …pipe_cnt].pipe.src.is_hsplit = (res_ctx->pipe_ctx[i].bottom_pipe && res_ctx->pipe_ctx[i].bottom_pi… in dcn20_populate_dml_pipes_from_context() 1657 struct pipe_ctx *split_pipe = res_ctx->pipe_ctx[i].bottom_pipe; in dcn20_populate_dml_pipes_from_context() 1661 split_pipe = split_pipe->bottom_pipe; in dcn20_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 949 pipe_ctx->bottom_pipe = NULL; in dcn35_plane_atomic_disable()
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