| /linux/Documentation/devicetree/bindings/fpga/ |
| A D | fpga-region.yaml | 68 * FPGA bridges may be actual hardware or soft logic on an FPGA. 74 buses, eliminating the need to show the hardware FPGA bridges in the 118 1. Disable appropriate FPGA bridges. 120 3. Enable the FPGA bridges. 125 will disable the bridges. 170 hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges 186 * Full reconfiguration with hardware bridges 191 register access to the FPGA. Additional bridges may be listed in a 194 * Partial reconfiguration with bridges in the FPGA 260 fpga-bridges: [all …]
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| A D | altr,freeze-bridge-controller.yaml | 10 The Altera Freeze Bridge Controller manages one or more freeze bridges. 11 The controller can freeze/disable the bridges which prevents signal 13 unfreeze/enable the bridges which allows traffic to pass through the bridge
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| A D | xlnx,pr-decoupler.yaml | 17 decouplers/fpga bridges. The controller can decouple/disable the bridges 19 can also couple / enable the bridges which allows traffic to pass through the
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| A D | megachips-stdpxxxx-ge-b850v3-fw.txt | 2 STDP4028-ge-b850v3-fw bridges (LVDS-DP) 3 STDP2690-ge-b850v3-fw bridges (DP-DP++) 11 STDP2690 behave as the stock bridges would. The compatible strings include the 12 suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with 16 two bridges behaves as a single one. The only interfaces exposed by the
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| A D | simple-bridge.yaml | 7 title: Transparent non-programmable DRM bridges 14 This binding supports transparent non-programmable bridges that don't require
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| /linux/drivers/pcmcia/ |
| A D | Kconfig | 63 bridge. Virtually all modern PCMCIA bridges do this, and most of 71 comment "PC-card bridges" 79 This option enables support for CardBus host bridges. Virtually 80 all modern PCMCIA bridges are CardBus compatible. A "bridge" is 91 bool "Special initialization for O2Micro bridges" if EXPERT 96 bool "Special initialization for Ricoh bridges" if EXPERT 101 bool "Special initialization for TI and EnE bridges" if EXPERT 106 bool "Auto-tune EnE bridges for CB cards" if EXPERT 111 bool "Special initialization for Toshiba ToPIC bridges" if EXPERT 136 Say Y here to include support for ISA-bus PCMCIA host bridges that [all …]
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| /linux/drivers/soc/tegra/cbb/ |
| A D | tegra194-cbb.c | 172 struct tegra194_axi2apb_bridge *bridges; member 1893 status = tegra194_axi2apb_status(cbb->bridges[i].base); in print_errlog0() 2200 if (priv->bridges) { in tegra194_cbb_get_bridges() 2202 cbb->bridges = priv->bridges; in tegra194_cbb_get_bridges() 2209 if (!cbb->bridges) { in tegra194_cbb_get_bridges() 2213 sizeof(*cbb->bridges), GFP_KERNEL); in tegra194_cbb_get_bridges() 2214 if (!cbb->bridges) in tegra194_cbb_get_bridges() 2218 err = of_address_to_resource(np, i, &cbb->bridges[i].res); in tegra194_cbb_get_bridges() 2223 &cbb->bridges[i].res); in tegra194_cbb_get_bridges() 2224 if (IS_ERR(cbb->bridges[i].base)) in tegra194_cbb_get_bridges() [all …]
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| /linux/Documentation/driver-api/fpga/ |
| A D | fpga-programming.rst | 12 the FPGA manager and bridges. It will: 16 * build a list of FPGA bridges if a method has been specified to do so 17 * disable the bridges 19 * re-enable the bridges 31 bridges to control during programming or it has a pointer to a function that
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| A D | fpga-region.rst | 12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an 26 * which bridges to disable before programming and enable afterwards. 68 The FPGA region will need to specify which bridges to control while programming 69 the FPGA. The region driver can build a list of bridges during probe time 71 the list of bridges to program just before programming 79 * fpga_bridges_put() - Given a list of bridges, put them
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| /linux/drivers/ata/ |
| A D | pata_ftide010.c | 274 int bridges = 0; in pata_ftide010_gemini_port_start() local 285 bridges++; in pata_ftide010_gemini_port_start() 291 bridges++; in pata_ftide010_gemini_port_start() 298 bridges++; in pata_ftide010_gemini_port_start() 305 bridges++; in pata_ftide010_gemini_port_start() 308 dev_info(dev, "brought %d bridges online\n", bridges); in pata_ftide010_gemini_port_start() 309 return (bridges > 0) ? 0 : -EINVAL; // -ENODEV; in pata_ftide010_gemini_port_start()
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| /linux/Documentation/devicetree/bindings/ata/ |
| A D | cortina,gemini-sata-bridge.yaml | 14 takes two Faraday Technology FTIDE010 PATA controllers and bridges 26 description: phandles to the reset lines for both SATA bridges 55 bridges.
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| /linux/Documentation/devicetree/bindings/pci/ |
| A D | pci.txt | 1 PCI bus bridges have standardized Device Tree bindings: 18 host bridges in the system, otherwise potentially conflicting domain numbers 19 may be assigned to root buses behind different host bridges. The domain 68 When present, the port is external-facing. All bridges and endpoints
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| A D | apple,pcie.yaml | 18 PCIe host bridges is absent. 23 the child nodes that represent the PCI bridges that correspond to
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| A D | 83xx-512x-pci.txt | 1 * Freescale 83xx and 512x PCI bridges
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| /linux/Documentation/i2c/busses/ |
| A D | i2c-sis96x.rst | 11 Any combination of these host bridges: 14 and these south bridges:
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| A D | i2c-ali1563.rst | 24 the i2c controller found in the Intel 801 south bridges.
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| A D | i2c-ali1535.rst | 25 M15x3 South bridges also produced by Acer Labs Inc. Some of the registers
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| /linux/Documentation/devicetree/bindings/arm/tegra/ |
| A D | nvidia,tegra194-axi2apb.yaml | 22 description: Physical base address and length of registers for all bridges
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| A D | nvidia,tegra194-cbb.yaml | 16 initiators and targets using different bridges like AXIP2P, AXI2APB. 69 Specifies the node having all axi2apb bridges which need to be checked
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| /linux/net/bridge/ |
| A D | Kconfig | 15 Several such bridges can work together to create even larger 17 As this is a standard, Linux bridges will cooperate properly with
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| /linux/Documentation/devicetree/bindings/w1/ |
| A D | maxim,ds2482.yaml | 13 I2C to 1-wire bridges
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| /linux/Documentation/PCI/ |
| A D | msi-howto.rst | 50 bridges). In order to ensure that all the data has arrived in memory, 239 Some PCI bridges are not able to route MSIs between buses properly. 242 Some bridges allow you to enable MSIs by changing some bits in their 259 Again, please notify linux-pci@vger.kernel.org of any bridges that need 280 Then, 'lspci -t' gives the list of bridges above a device. Reading 283 to bridges between the PCI root and the device, MSIs are disabled.
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| A D | acpi-info.rst | 4 ACPI considerations for PCI host bridges 11 host bridges, so the ACPI namespace must describe each host bridge, the 44 PCI host bridges are PNP0A03 or PNP0A08 devices. Their _CRS should 93 bridges [8]. Since MCFG is a static table and can't be updated by hotplug,
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| /linux/Documentation/networking/ |
| A D | bridge.rst | 11 operation of bridges in computer networks. A bridge, in the context of this 101 different bridges. 102 3. Bridge Election: When the network starts, all bridges initially assume 111 BPDUs with information about the root bridge to all other bridges in the 112 network. This information is used by other bridges to calculate the 119 all in the forwarding state. while other bridges have some ports in the
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/esw/ |
| A D | bridge.h | 19 struct list_head bridges; member
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