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Searched refs:ccr (Results 1 – 25 of 94) sorted by relevance

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/linux/drivers/net/can/sja1000/
A Dpeak_pcmcia.c140 u8 ccr; member
223 if (card->ccr == v) in pcan_write_reg()
225 card->ccr = v; in pcan_write_reg()
343 u8 ccr = card->ccr; in pcan_set_leds() local
380 u8 ccr; in pcan_led_timer() local
382 ccr = card->ccr; in pcan_led_timer()
386 ccr |= PCC_CCR_LED_ON_CHAN(i); in pcan_led_timer()
396 ccr |= PCC_CCR_LED_SLOW_CHAN(i); in pcan_led_timer()
517 u8 ccr = PCC_CCR_INIT; in pcan_add_channels() local
520 card->ccr = ~ccr; in pcan_add_channels()
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/linux/arch/powerpc/math-emu/
A Dmcrfs.c10 mcrfs(u32 *ccr, u32 crfD, u32 crfS) in mcrfs() argument
15 printk("%s: %p (%08x) %d %d\n", __func__, ccr, *ccr, crfD, crfS); in mcrfs()
25 *ccr &= ~(15 << ((7 - crfD) << 2)); in mcrfs()
26 *ccr |= (value << ((7 - crfD) << 2)); in mcrfs()
29 printk("CR: %08x\n", __func__, *ccr); in mcrfs()
A Dfcmpu.c11 fcmpu(u32 *ccr, int crfD, void *frA, void *frB) in fcmpu() argument
20 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB); in fcmpu()
37 *ccr &= ~(15 << ((7 - crfD) << 2)); in fcmpu()
38 *ccr |= (cmp << ((7 - crfD) << 2)); in fcmpu()
41 printk("CR: %08x\n", *ccr); in fcmpu()
A Dfcmpo.c11 fcmpo(u32 *ccr, int crfD, void *frA, void *frB) in fcmpo() argument
20 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB); in fcmpo()
40 *ccr &= ~(15 << ((7 - crfD) << 2)); in fcmpo()
41 *ccr |= (cmp << ((7 - crfD) << 2)); in fcmpo()
44 printk("CR: %08x\n", *ccr); in fcmpo()
/linux/drivers/mtd/nand/raw/
A Dndfc.c44 uint32_t ccr; in ndfc_select_chip() local
47 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); in ndfc_select_chip()
49 ccr &= ~NDFC_CCR_BS_MASK; in ndfc_select_chip()
52 ccr |= NDFC_CCR_RESET_CE; in ndfc_select_chip()
53 out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); in ndfc_select_chip()
78 uint32_t ccr; in ndfc_enable_hwecc() local
81 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); in ndfc_enable_hwecc()
82 ccr |= NDFC_CCR_RESET_ECC; in ndfc_enable_hwecc()
189 u32 ccr; in ndfc_probe() local
219 ccr = NDFC_CCR_BS(ndfc->chip_select); in ndfc_probe()
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/linux/arch/sh/mm/
A Dcache-shx3.c21 unsigned int ccr; in shx3_cache_init() local
23 ccr = __raw_readl(SH_CCR); in shx3_cache_init()
29 ccr |= CCR_CACHE_SNM; in shx3_cache_init()
41 ccr |= CCR_CACHE_IBE; in shx3_cache_init()
44 writel_uncached(ccr, SH_CCR); in shx3_cache_init()
A Dcache-debugfs.c30 unsigned long ccr; in cache_debugfs_show() local
39 ccr = __raw_readl(SH_CCR); in cache_debugfs_show()
40 if ((ccr & CCR_CACHE_ENABLE) == 0) { in cache_debugfs_show()
61 if ((ccr & CCR_CACHE_ORA) && cache_type == CACHE_TYPE_DCACHE) in cache_debugfs_show()
A Dcache-sh2.c60 unsigned long ccr; in sh2__flush_invalidate_region() local
65 ccr = __raw_readl(SH_CCR); in sh2__flush_invalidate_region()
66 ccr |= CCR_CACHE_INVALIDATE; in sh2__flush_invalidate_region()
67 __raw_writel(ccr, SH_CCR); in sh2__flush_invalidate_region()
/linux/drivers/dma/
A Dtxx9dmac.h167 u32 ccr; member
239 return (dc->ccr & TXX9_DMA_CCR_INTENT) != 0; in txx9dmac_chan_INTENT()
244 dc->ccr |= TXX9_DMA_CCR_INTENT; in txx9dmac_chan_set_INTENT()
254 dc->ccr |= TXX9_DMA_CCR_SMPCHN; in txx9dmac_chan_set_SMPCHN()
259 u32 sair, u32 dair, u32 ccr) in txx9dmac_desc_set_nosimple() argument
289 u32 sai, u32 dai, u32 ccr) in txx9dmac_desc_set_nosimple() argument
294 desc->hwdesc.CCR = ccr; in txx9dmac_desc_set_nosimple()
298 desc->hwdesc32.CCR = ccr; in txx9dmac_desc_set_nosimple()
A Dpl330.c237 #define BRST_LEN(ccr) ((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1) argument
238 #define BRST_SIZE(ccr) (1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7)) argument
240 #define BYTE_TO_BURST(b, ccr) ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr)) argument
241 #define BURST_TO_BYTE(c, ccr) ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr)) argument
551 u32 ccr; member
1376 u32 ccr = pxs->ccr; in _setup_loops() local
1379 BRST_SIZE(ccr); in _setup_loops()
1439 u32 ccr = 0; in _prepare_ccr() local
1466 return ccr; in _prepare_ccr()
1481 u32 ccr; in pl330_submit_req() local
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/linux/drivers/spi/
A Dspi-mpc512x-psc.c90 u32 ccr; in mpc512x_psc_spi_activate_cs() local
113 ccr = in_be32(psc_addr(mps, ccr)); in mpc512x_psc_spi_activate_cs()
114 ccr &= 0xFF000000; in mpc512x_psc_spi_activate_cs()
120 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8)); in mpc512x_psc_spi_activate_cs()
121 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_activate_cs()
388 u32 ccr; in mpc512x_psc_spi_port_config() local
416 ccr = in_be32(psc_addr(mps, ccr)); in mpc512x_psc_spi_port_config()
417 ccr &= 0xFF000000; in mpc512x_psc_spi_port_config()
420 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8)); in mpc512x_psc_spi_port_config()
421 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_port_config()
A Dspi-mpc52xx-psc.c66 u16 ccr; in mpc52xx_psc_spi_activate_cs() local
90 ccr = in_be16((u16 __iomem *)&psc->ccr); in mpc52xx_psc_spi_activate_cs()
91 ccr &= 0xFF00; in mpc52xx_psc_spi_activate_cs()
93 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
95 ccr |= (MCLK / 1000000 - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
96 out_be16((u16 __iomem *)&psc->ccr, ccr); in mpc52xx_psc_spi_activate_cs()
269 out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */ in mpc52xx_psc_spi_port_config()
/linux/drivers/rtc/
A Drtc-isl12026.c206 u8 ccr[8]; in isl12026_rtc_read_time() local
243 msgs[1].len = sizeof(ccr); in isl12026_rtc_read_time()
244 msgs[1].buf = ccr; in isl12026_rtc_read_time()
253 tm->tm_sec = bcd2bin(ccr[0] & 0x7F); in isl12026_rtc_read_time()
254 tm->tm_min = bcd2bin(ccr[1] & 0x7F); in isl12026_rtc_read_time()
255 if (ccr[2] & ISL12026_REG_HR_MIL) in isl12026_rtc_read_time()
259 ((ccr[2] & 0x20) ? 12 : 0); in isl12026_rtc_read_time()
260 tm->tm_mday = bcd2bin(ccr[3] & 0x3F); in isl12026_rtc_read_time()
262 tm->tm_year = bcd2bin(ccr[5]); in isl12026_rtc_read_time()
263 if (bcd2bin(ccr[7]) == 20) in isl12026_rtc_read_time()
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A Drtc-xgene.c79 u32 ccr; in xgene_rtc_alarm_irq_enable() local
81 ccr = readl(pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable()
83 ccr &= ~RTC_CCR_MASK; in xgene_rtc_alarm_irq_enable()
84 ccr |= RTC_CCR_IE; in xgene_rtc_alarm_irq_enable()
86 ccr &= ~RTC_CCR_IE; in xgene_rtc_alarm_irq_enable()
87 ccr |= RTC_CCR_MASK; in xgene_rtc_alarm_irq_enable()
89 writel(ccr, pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable()
A Drtc-armada38x.c400 unsigned long ccr, flags; in armada38x_rtc_read_offset() local
404 ccr = rtc->data->read_rtc_reg(rtc, RTC_CCR); in armada38x_rtc_read_offset()
407 ppb_cor = (ccr & RTC_CCR_MODE ? 3815 : 954) * (s8)ccr; in armada38x_rtc_read_offset()
417 unsigned long ccr = 0; in armada38x_rtc_set_offset() local
436 ccr = RTC_CCR_MODE; in armada38x_rtc_set_offset()
444 ccr |= (off & 0x3fff) ^ 0x2000; in armada38x_rtc_set_offset()
445 rtc_delayed_write(ccr, rtc, RTC_CCR); in armada38x_rtc_set_offset()
/linux/drivers/dma/stm32/
A Dstm32-mdma.c224 u32 ccr; member
407 u32 ccr, cisr, id, reg; in stm32_mdma_disable_chan() local
417 if (ccr & STM32_MDMA_CCR_EN) { in stm32_mdma_disable_chan()
484 u32 ccr, ctcr, ctbr, tlen; in stm32_mdma_set_xfer_param() local
665 *mdma_ccr = ccr; in stm32_mdma_set_xfer_param()
779 desc->ccr = ccr; in stm32_mdma_setup_xfer()
852 u32 ccr, ctcr, ctbr, count; in stm32_mdma_prep_dma_cyclic() local
903 desc->ccr = ccr; in stm32_mdma_prep_dma_cyclic()
976 ccr |= STM32_MDMA_CCR_TEIE; in stm32_mdma_prep_dma_memcpy()
1108 desc->ccr = ccr; in stm32_mdma_prep_dma_memcpy()
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A Dstm32-dma3.c267 u32 ccr; member
414 swdesc->ccr = 0; in stm32_dma3_chan_desc_alloc()
421 swdesc->ccr &= ~CCR_LAP; in stm32_dma3_chan_desc_alloc()
741 u32 csr, ccr; in stm32_dma3_chan_start() local
785 ccr |= CCR_SUSP; in stm32_dma3_chan_suspend()
787 ccr &= ~CCR_SUSP; in stm32_dma3_chan_suspend()
942 u32 ccr; in stm32_dma3_chan_stop() local
951 if (!(ccr & CCR_SUSP) && (ccr & CCR_EN)) { in stm32_dma3_chan_stop()
981 u32 misr, csr, ccr; in stm32_dma3_chan_irq() local
1027 csr &= (ccr | CCR_HTIE); in stm32_dma3_chan_irq()
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/linux/drivers/dma/ti/
A Domap-dma.c67 uint32_t ccr; member
121 uint32_t ccr; /* CCR value */ member
746 c->ccr |= c->dma_ch + 1; in omap_dma_alloc_chan_resources()
751 c->ccr = c->dma_sig & 0x1f; in omap_dma_alloc_chan_resources()
936 if (!(ccr & CCR_ENABLE)) { in omap_dma_tx_status()
1029 d->ccr = c->ccr | CCR_SYNC_FRAME; in omap_dma_prep_slave_sg()
1077 d->ccr |= CCR_TRIGGER_SRC; in omap_dma_prep_slave_sg()
1194 d->ccr = c->ccr; in omap_dma_prep_dma_cyclic()
1215 d->ccr |= CCR_SYNC_PACKET; in omap_dma_prep_dma_cyclic()
1265 d->ccr = c->ccr; in omap_dma_prep_dma_memcpy()
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/linux/arch/sparc/include/asm/
A Dbackoff.h57 88: rd %ccr, %g0; \
58 rd %ccr, %g0; \
59 rd %ccr, %g0; \
/linux/arch/sh/kernel/cpu/
A Dinit.c109 unsigned long ccr, flags; in cache_init() local
112 ccr = __raw_readl(SH_CCR); in cache_init()
125 if (ccr & CCR_CACHE_ENABLE) { in cache_init()
135 if (ccr & CCR_CACHE_ORA) in cache_init()
143 if (!(ccr & CCR_CACHE_EMODE)) in cache_init()
/linux/arch/powerpc/kvm/
A Dbook3s_hv_tm_builtin.c101 vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | in kvmhv_p9_tm_emulation_early()
118 vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | 0xa0000000; in kvmhv_emulate_tm_rollback()
A Dbook3s_hv_tm.c156 vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | in kvmhv_p9_tm_emulation()
203 vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | in kvmhv_p9_tm_emulation()
236 vcpu->arch.regs.ccr = (vcpu->arch.regs.ccr & 0x0fffffff) | in kvmhv_p9_tm_emulation()
/linux/arch/powerpc/include/asm/
A Dsyscall.h60 return (regs->ccr & 0x10000000UL) ? -regs->gpr[3] : 0; in syscall_get_error()
84 regs->ccr |= 0x10000000L; in syscall_set_return_value()
87 regs->ccr &= ~0x10000000L; in syscall_set_return_value()
/linux/arch/arm/mach-omap1/
A Domap-dma.c138 u16 ccr; in omap_set_dma_transfer_params() local
145 ccr = p->dma_read(CCR, lch); in omap_set_dma_transfer_params()
146 ccr &= ~(1 << 5); in omap_set_dma_transfer_params()
148 ccr |= 1 << 5; in omap_set_dma_transfer_params()
149 p->dma_write(ccr, CCR, lch); in omap_set_dma_transfer_params()
151 ccr = p->dma_read(CCR2, lch); in omap_set_dma_transfer_params()
152 ccr &= ~(1 << 2); in omap_set_dma_transfer_params()
154 ccr |= 1 << 2; in omap_set_dma_transfer_params()
155 p->dma_write(ccr, CCR2, lch); in omap_set_dma_transfer_params()
/linux/arch/arm/mach-mmp/
A Dtime.c151 uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR); in timer_config() local
155 ccr &= (cpu_is_mmp2() || cpu_is_mmp3()) ? in timer_config()
158 __raw_writel(ccr, mmp_timer_base + TMR_CCR); in timer_config()

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