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Searched refs:cfg1 (Results 1 – 25 of 50) sorted by relevance

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/linux/arch/loongarch/mm/
A Dcache.c96 unsigned int cfg1; \
98 cfg1 = read_cpucfg(LOONGARCH_CPUCFG17 + leaf); \
109 cdesc->ways = ((cfg1 & CPUCFG_CACHE_WAYS_M) >> CPUCFG_CACHE_WAYS) + 1; \
110 cdesc->sets = 1 << ((cfg1 & CPUCFG_CACHE_SETS_M) >> CPUCFG_CACHE_SETS); \
111 cdesc->linesz = 1 << ((cfg1 & CPUCFG_CACHE_LSIZE_M) >> CPUCFG_CACHE_LSIZE); \
/linux/drivers/clk/thead/
A Dclk-th1520-ap.c40 u16 cfg1; member
245 unsigned int cfg0, cfg1; in th1520_pll_vco_recalc_rate() local
249 regmap_read(pll->common.map, pll->common.cfg1, &cfg1); in th1520_pll_vco_recalc_rate()
272 regmap_read(pll->common.map, pll->common.cfg1, &cfg1); in th1520_pll_postdiv_recalc_rate()
308 .cfg1 = 0x004,
320 .cfg1 = 0x014,
332 .cfg1 = 0x024,
352 .cfg1 = 0x034,
372 .cfg1 = 0x044,
388 .cfg1 = 0x054,
[all …]
/linux/drivers/comedi/drivers/
A Dni_at_ao.c106 unsigned short cfg1; member
118 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
120 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
269 devpriv->cfg1 = 0; in atao_reset()
270 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
/linux/drivers/gpu/drm/exynos/
A Dexynos_drm_fimc.c419 u32 cfg1, cfg2; in fimc_src_set_transf() local
423 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
424 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
433 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
440 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
445 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
463 fimc_write(ctx, cfg1, EXYNOS_MSCTRL); in fimc_src_set_transf()
1011 u32 cfg0, cfg1; in fimc_start() local
[all …]
/linux/drivers/gpu/drm/nouveau/dispnv04/
A Darb.c202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
225 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
226 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
/linux/drivers/net/wireless/realtek/rtw89/
A Dpci_be.c411 u32 ctrl0, cfg0, cfg1, dec_ctrl, idle_ltcy, act_ltcy, dis_ltcy; in rtw89_pci_ltr_set_v2() local
419 cfg1 = rtw89_read32(rtwdev, R_BE_LTR_CFG_1); in rtw89_pci_ltr_set_v2()
420 if (rtw89_pci_ltr_is_err_reg_val(cfg1)) in rtw89_pci_ltr_set_v2()
448 cfg1 = u32_replace_bits(cfg1, 0xC0, B_BE_LTR_CMAC0_RX_USE_PG_TH_MASK); in rtw89_pci_ltr_set_v2()
449 cfg1 = u32_replace_bits(cfg1, 0xC0, B_BE_LTR_CMAC1_RX_USE_PG_TH_MASK); in rtw89_pci_ltr_set_v2()
459 rtw89_write32(rtwdev, R_BE_LTR_CFG_1, cfg1); in rtw89_pci_ltr_set_v2()
/linux/drivers/media/platform/atmel/
A Datmel-isi.c360 u32 ctrl, cfg1; in start_dma() local
362 cfg1 = isi_readl(isi, ISI_CFG1); in start_dma()
387 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; in start_dma()
398 isi_writel(isi, ISI_CFG1, cfg1); in start_dma()
795 u32 cfg1 = 0; in isi_camera_set_bus_param() local
800 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
802 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
806 cfg1 |= ISI_CFG1_EMB_SYNC; in isi_camera_set_bus_param()
808 cfg1 |= ISI_CFG1_FULL_MODE; in isi_camera_set_bus_param()
810 cfg1 |= ISI_CFG1_THMASK_BEATS_16; in isi_camera_set_bus_param()
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
A Dphy.c187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
191 cfg1 = 0x00011414; in mt76x2_configure_tx_delay()
194 cfg1 = 0x00021414; in mt76x2_configure_tx_delay()
197 mt76_wr(dev, MT_TX_SW_CFG1, cfg1); in mt76x2_configure_tx_delay()
/linux/drivers/iio/adc/
A Dimx7d_adc.c236 u32 cfg1 = 0; in imx7d_adc_channel_set() local
243 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
253 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
270 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
/linux/drivers/perf/
A Dfsl_imx8_ddr_perf.c556 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
570 cfg1 ^= AXI_MASKING_REVERT; in ddr_perf_event_add()
571 writel(cfg1, pmu->base + COUNTER_DPCR1); in ddr_perf_event_add()
584 cfg1 ^= AXI_MASKING_REVERT; in ddr_perf_event_add()
585 writel(cfg1, pmu->base + COUNTER_MASK_COMP + ((counter - 1) << 4)); in ddr_perf_event_add()
A Dfsl_imx9_ddr_perf.c604 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
624 imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2); in ddr_perf_event_add()
628 imx95_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2); in ddr_perf_event_add()
/linux/drivers/infiniband/hw/erdma/
A Derdma_hw.h242 u32 cfg1; member
268 u32 cfg1; member
331 u32 cfg1; member
A Derdma_verbs.c54 req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_QP_RQ_DEPTH_MASK, in create_qp_cmd()
156 req.cfg1 = FIELD_PREP(ERDMA_CMD_REGMR_PD_MASK, pd->pdn) | in regmr_cmd()
196 req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_EQN_MASK, cq->assoc_eqn); in create_cq_cmd()
205 req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK, 1) | in create_cq_cmd()
219 req.cfg1 |= in create_cq_cmd()
225 req.cfg1 |= in create_cq_cmd()
229 req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK, in create_cq_cmd()
236 req.cfg1 |= FIELD_PREP( in create_cq_cmd()
/linux/arch/sparc/include/asm/
A Dsbi.h21 /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ member
/linux/drivers/video/fbdev/nvidia/
A Dnv_hw.c387 unsigned int MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
391 cfg1 = NV_RD32(par->PFB, 0x00000204); in nv4UpdateArbitrationSettings()
397 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
400 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
626 unsigned int MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
630 cfg1 = NV_RD32(par->PFB, 0x0204); in nv10UpdateArbitrationSettings()
637 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
640 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
/linux/drivers/net/ethernet/agere/
A Det131x.c819 &macregs->cfg1); in et1310_config_mac_regs1()
861 writel(0, &macregs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
921 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
927 cfg1); in et1310_config_mac_regs2()
1689 writel(reg, &adapter->regs->mac.cfg1); in et131x_soft_reset()
1696 writel(reg, &adapter->regs->mac.cfg1); in et131x_soft_reset()
[all …]
/linux/drivers/soc/qcom/
A Dqcom-geni-se.c433 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
462 cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
466 writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1); in geni_se_config_packing()
470 writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1); in geni_se_config_packing()
/linux/sound/pci/
A Dals4000.c691 u32 cfg1 = 0; in snd_als4000_set_addr() local
699 cfg1 |= (game_io | 1) << 16; in snd_als4000_set_addr()
701 cfg1 |= (opl_io | 1); in snd_als4000_set_addr()
702 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); in snd_als4000_set_addr()
/linux/drivers/phy/qualcomm/
A Dphy-qcom-edp.c722 u8 cfg1; in qcom_edp_phy_power_on() local
801 cfg1 = 0x1; in qcom_edp_phy_power_on()
807 cfg1 = 0x3; in qcom_edp_phy_power_on()
813 cfg1 = 0xf; in qcom_edp_phy_power_on()
820 writel(cfg1, edp->edp + DP_PHY_CFG_1); in qcom_edp_phy_power_on()
/linux/drivers/video/fbdev/riva/
A Driva_hw.c802 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
810 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv4UpdateArbitrationSettings()
816 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
818 sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
1051 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
1059 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv10UpdateArbitrationSettings()
1067 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
1069 sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
/linux/Documentation/devicetree/bindings/thermal/
A Dti,j72xx-thermal.yaml35 - description: VTM cfg1 register space
/linux/include/linux/
A Dswitchtec.h232 struct partition_info cfg1; member
259 struct partition_info cfg1; member
/linux/drivers/pci/controller/
A Dpcie-altera.c324 u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1; in get_tlp_header() local
328 cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; in get_tlp_header()
330 cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; in get_tlp_header()
/linux/drivers/mtd/nand/raw/
A Dqcom_nandc.c318 __le32 cfg1; member
534 u32 cfg0, cfg1; member
715 return &regs->cfg1; in offset_to_nandc_reg()
814 u32 cmd, cfg0, cfg1, ecc_bch_cfg; in update_rw_regs() local
830 cfg1 = host->cfg1; in update_rw_regs()
836 cfg1 = host->cfg1_raw; in update_rw_regs()
842 nandc_set_reg(chip, NAND_DEV0_CFG1, cfg1); in update_rw_regs()
2497 host->cfg1 = 7 << NAND_RECOVERY_CYCLES in qcom_nand_attach_chip()
2537 host->cfg0, host->cfg1, host->ecc_buf_cfg, host->ecc_bch_cfg, in qcom_nand_attach_chip()
/linux/sound/pci/au88x0/
A Dau88x0_core.c1097 dma->cfg1 = 0; in vortex_adbdma_setbuffers()
1102 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize - 1); in vortex_adbdma_setbuffers()
1110 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); in vortex_adbdma_setbuffers()
1135 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG1 + (adbdma << 3), dma->cfg1); in vortex_adbdma_setbuffers()
1376 dma->cfg1 = 0; in vortex_wtdma_setbuffers()
1381 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize-1); in vortex_wtdma_setbuffers()
1388 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc); in vortex_wtdma_setbuffers()
1406 hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG1 + (wtdma << 3), dma->cfg1); in vortex_wtdma_setbuffers()

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