| /linux/drivers/rtc/ |
| A D | rtc-stm32.c | 146 u16 cfgr; member
256 unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr); in stm32_rtc_pinmux_action_alarm() local
286 writel_relaxed(cfgr, rtc->base + regs.cfgr); in stm32_rtc_pinmux_action_alarm()
297 unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr); in stm32_rtc_pinmux_lsco_available() local
822 .cfgr = UNDEF_REG,
848 .cfgr = UNDEF_REG,
883 .cfgr = 0x60,
909 .cfgr = 0x60,
942 if (regs.cfgr != UNDEF_REG) { in stm32_rtc_clean_outs()
943 unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr); in stm32_rtc_clean_outs() local
[all …]
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| /linux/drivers/pwm/ |
| A D | pwm-stm32-lp.c | 39 u32 val, mask, cfgr, presc = 0; in stm32_pwm_lp_apply() local
89 ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); in stm32_pwm_lp_apply()
93 if ((FIELD_GET(STM32_LPTIM_PRESC, cfgr) != presc) || in stm32_pwm_lp_apply()
94 (FIELD_GET(STM32_LPTIM_WAVPOL, cfgr) != state->polarity)) { in stm32_pwm_lp_apply()
|
| /linux/drivers/mmc/host/ |
| A D | mmci_stm32_sdmmc.c | 490 u32 cfgr; in sdmmc_dlyb_mp15_set_cfg() local
494 cfgr = FIELD_PREP(DLYB_CFGR_UNIT_MASK, unit) | in sdmmc_dlyb_mp15_set_cfg()
496 writel_relaxed(cfgr, dlyb->base + DLYB_CFGR); in sdmmc_dlyb_mp15_set_cfg()
507 u32 cfgr; in sdmmc_dlyb_mp15_prepare() local
513 ret = readl_relaxed_poll_timeout(dlyb->base + DLYB_CFGR, cfgr, in sdmmc_dlyb_mp15_prepare()
514 (cfgr & DLYB_CFGR_LNGF), in sdmmc_dlyb_mp15_prepare()
519 i, cfgr); in sdmmc_dlyb_mp15_prepare()
523 lng = FIELD_GET(DLYB_CFGR_LNG_MASK, cfgr); in sdmmc_dlyb_mp15_prepare()
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| /linux/drivers/memory/ |
| A D | stm32-fmc2-ebi.c | 206 u32 cfgr; member
306 u32 cfgr; in stm32_fmc2_ebi_mp25_check_clk_period() local
309 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_check_clk_period()
313 if (cfgr & FMC2_CFGR_CCLKEN && !ebi->access_granted) in stm32_fmc2_ebi_mp25_check_clk_period()
449 u32 cfgr, btr, clk_period; in stm32_fmc2_ebi_mp25_ns_to_clk_period() local
452 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_ns_to_clk_period()
456 if (cfgr & FMC2_CFGR_CCLKEN) { in stm32_fmc2_ebi_mp25_ns_to_clk_period()
837 u32 val, cfgr; in stm32_fmc2_ebi_mp25_set_clk_period() local
840 ret = regmap_read(ebi->regmap, FMC2_CFGR, &cfgr); in stm32_fmc2_ebi_mp25_set_clk_period()
844 if (cfgr & FMC2_CFGR_CCLKEN) { in stm32_fmc2_ebi_mp25_set_clk_period()
[all …]
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| /linux/sound/soc/stm/ |
| A D | stm32_i2s.c | 726 u32 cfgr, cfgr_mask, cfg1; in stm32_i2s_configure() local
732 cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_16); in stm32_i2s_configure()
736 cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_32) | in stm32_i2s_configure()
746 cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_SLAVE); in stm32_i2s_configure()
749 cfgr |= I2S_CGFR_FIXCH; in stm32_i2s_configure()
752 cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_MASTER); in stm32_i2s_configure()
757 cfgr_mask, cfgr); in stm32_i2s_configure()
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| /linux/drivers/perf/ |
| A D | arm_smmuv3_pmu.c | 848 u32 cfgr, reg_size; in smmu_pmu_probe() local
881 cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); in smmu_pmu_probe()
884 if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { in smmu_pmu_probe()
901 smmu_pmu->num_counters = FIELD_GET(SMMU_PMCG_CFGR_NCTR, cfgr) + 1; in smmu_pmu_probe()
903 smmu_pmu->global_filter = !!(cfgr & SMMU_PMCG_CFGR_SID_FILTER_TYPE); in smmu_pmu_probe()
905 reg_size = FIELD_GET(SMMU_PMCG_CFGR_SIZE, cfgr); in smmu_pmu_probe()
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| /linux/Documentation/devicetree/bindings/dma/ |
| A D | snps,dw-axi-dmac.yaml | 53 - const: cfgr-clk
145 clock-names = "core-clk", "cfgr-clk";
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| /linux/drivers/net/ethernet/freescale/enetc/ |
| A D | enetc_pf.c | 384 u32 cfgr; in enetc_pf_set_vf_spoofchk() local
389 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); in enetc_pf_set_vf_spoofchk()
390 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); in enetc_pf_set_vf_spoofchk()
391 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); in enetc_pf_set_vf_spoofchk()
|
| /linux/arch/arm64/boot/dts/intel/ |
| A D | socfpga_agilex5.dtsi | 271 clock-names = "core-clk", "cfgr-clk";
288 clock-names = "core-clk", "cfgr-clk";
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| /linux/drivers/pinctrl/ |
| A D | pinctrl-at91-pio4.c | 145 u32 cfgr[ATMEL_PIO_NPINS_PER_BANK]; member
1007 atmel_pioctrl->pm_suspend_backup[i].cfgr[j] = in atmel_pctrl_suspend()
1030 atmel_pioctrl->pm_suspend_backup[i].cfgr[j]); in atmel_pctrl_resume()
|
| /linux/arch/riscv/boot/dts/sophgo/ |
| A D | cv18xx.dtsi | 305 clock-names = "core-clk", "cfgr-clk";
|
| /linux/arch/arc/boot/dts/ |
| A D | hsdk.dts | 332 clock-names = "core-clk", "cfgr-clk";
|
| /linux/arch/riscv/boot/dts/canaan/ |
| A D | k210.dtsi | 158 clock-names = "core-clk", "cfgr-clk";
|
| /linux/arch/riscv/boot/dts/thead/ |
| A D | th1520.dtsi | 418 clock-names = "core-clk", "cfgr-clk";
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| /linux/drivers/net/ethernet/freescale/ |
| A D | fec_main.c | 1172 u32 cfgr; in fec_restart() local
1183 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1186 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M; in fec_restart()
1187 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
|
| /linux/arch/riscv/boot/dts/starfive/ |
| A D | jh7110.dtsi | 1068 clock-names = "core-clk", "cfgr-clk";
|