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Searched refs:clk_core (Results 1 – 19 of 19) sorted by relevance

/linux/include/trace/events/
A Dclk.h13 struct clk_core;
17 TP_PROTO(struct clk_core *core),
34 TP_PROTO(struct clk_core *core),
41 TP_PROTO(struct clk_core *core),
48 TP_PROTO(struct clk_core *core),
55 TP_PROTO(struct clk_core *core),
62 TP_PROTO(struct clk_core *core),
69 TP_PROTO(struct clk_core *core),
167 TP_PROTO(struct clk_core *core, struct clk_core *parent),
186 TP_PROTO(struct clk_core *core, struct clk_core *parent),
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/linux/drivers/clk/
A Dclk.c54 struct clk_core *core;
60 struct clk_core { struct
103 struct clk_core *core; argument
193 struct clk_core *core; in clk_pm_runtime_put_all()
390 struct clk_core *ret; in __clk_lookup_subtree()
407 struct clk_core *ret; in clk_core_lookup()
484 static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) in clk_core_get()
2116 static struct clk_core *__clk_set_parent_before(struct clk_core *core, in __clk_set_parent_before()
2282 static struct clk_core *clk_calc_new_rates(struct clk_core *core, in clk_calc_new_rates()
2821 static struct clk_core *__clk_init_parent(struct clk_core *core) in __clk_init_parent()
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/linux/arch/mips/boot/dts/img/
A Dpistachio.dtsi29 clocks = <&clk_core CLK_MIPS_PLL>;
139 <&clk_core CLK_I2S>;
159 <&clk_core CLK_AUDIO_DAC>;
176 <&clk_core CLK_SPDIF>;
260 <&clk_core CLK_UART0_DIV>;
275 <&clk_core CLK_UART1_DIV>;
288 clocks = <&clk_core CLK_AUX_ADC>;
291 <&clk_core CLK_AUX_ADC_DIV>;
787 <&clk_core CLK_ENET_DIV>;
841 clk_core: clk@18144000 { label
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/linux/drivers/cpufreq/
A Dpxa2xx-cpufreq.c46 struct clk *clk_core; member
181 return (unsigned int) clk_get_rate(data->clk_core) / 1000; in pxa_cpufreq_get()
207 clk_set_rate(data->clk_core, new_freq_cpu * 1000); in pxa_set_target()
302 pxa_cpufreq_data.clk_core = clk_get_sys(NULL, "core"); in pxa_cpu_init()
303 if (IS_ERR(pxa_cpufreq_data.clk_core)) in pxa_cpu_init()
304 return PTR_ERR(pxa_cpufreq_data.clk_core); in pxa_cpu_init()
/linux/drivers/mmc/host/
A Dsdhci-pxav3.c50 struct clk *clk_core; member
398 pxa->clk_core = devm_clk_get(dev, "core"); in sdhci_pxav3_probe()
399 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_probe()
400 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_probe()
467 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_probe()
486 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_remove()
537 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_suspend()
538 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_runtime_suspend()
550 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_resume()
551 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_runtime_resume()
A Dsdhci-pxav2.c262 struct clk *clk, *clk_core; in sdhci_pxav2_probe() local
281 clk_core = devm_clk_get_optional_enabled(dev, "core"); in sdhci_pxav2_probe()
282 if (IS_ERR(clk_core)) { in sdhci_pxav2_probe()
283 ret = PTR_ERR(clk_core); in sdhci_pxav2_probe()
/linux/Documentation/driver-api/
A Dclk.rst38 is defined in struct clk_foo and pointed to within struct clk_core. This
45 Below is the common struct clk_core definition from
48 struct clk_core {
53 struct clk_core *parent;
55 struct clk_core **parents;
65 Platforms and devices utilizing the common struct clk_core use the struct
66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
106 The strength of the common struct clk_core comes from its .ops and .hw pointers
122 framework code and struct clk_core.
/linux/drivers/phy/rockchip/
A Dphy-rockchip-typec.c376 struct clk *clk_core; member
728 ret = clk_prepare_enable(tcphy->clk_core); in tcphy_phy_init()
793 clk_disable_unprepare(tcphy->clk_core); in tcphy_phy_init()
802 clk_disable_unprepare(tcphy->clk_core); in tcphy_phy_deinit()
1050 tcphy->clk_core = devm_clk_get(dev, "tcpdcore"); in tcphy_parse_dt()
1051 if (IS_ERR(tcphy->clk_core)) { in tcphy_parse_dt()
1053 return PTR_ERR(tcphy->clk_core); in tcphy_parse_dt()
/linux/Documentation/devicetree/bindings/phy/
A Dpistachio-usb-phy.txt23 clocks = <&clk_core CLK_USB_PHY>;
/linux/Documentation/devicetree/bindings/mips/img/
A Dpistachio.txt30 clocks = <&clk_core CLK_MIPS>;
/linux/Documentation/devicetree/bindings/sound/
A Dimg,parallel-out.txt39 <&clk_core CLK_AUDIO_DAC>;
A Dimg,spdif-out.txt39 <&clk_core CLK_SPDIF>;
A Dimg,i2s-out.txt45 <&clk_core CLK_I2S>;
A Dti,pcm3168a.yaml99 clocks = <&clk_core 42>;
/linux/drivers/gpu/drm/etnaviv/
A Detnaviv_gpu.c486 clk_set_rate(gpu->clk_core, in etnaviv_gpu_update_clock()
1624 ret = clk_prepare_enable(gpu->clk_core); in etnaviv_gpu_clk_enable()
1635 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_enable()
1647 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_disable()
1897 gpu->clk_core = devm_clk_get(&pdev->dev, "core"); in etnaviv_gpu_platform_probe()
1898 DBG("clk_core: %p", gpu->clk_core); in etnaviv_gpu_platform_probe()
1899 if (IS_ERR(gpu->clk_core)) in etnaviv_gpu_platform_probe()
1900 return PTR_ERR(gpu->clk_core); in etnaviv_gpu_platform_probe()
1901 gpu->base_rate_core = clk_get_rate(gpu->clk_core); in etnaviv_gpu_platform_probe()
A Detnaviv_gpu.h158 struct clk *clk_core; member
/linux/Documentation/devicetree/bindings/clock/
A Dpistachio-clock.txt34 clk_core: clock-controller@18144000 {
65 clocks = <&clk_core CLK_PERIPH_SYS>;
/linux/drivers/media/platform/allegro-dvt/
A Dallegro-core.c157 struct clk *clk_core; member
977 clk_rate = clk_get_rate(dev->clk_core); in allegro_encoder_buffer_init()
3885 dev->clk_core = devm_clk_get(&pdev->dev, "core_clk"); in allegro_probe()
3886 if (IS_ERR(dev->clk_core)) in allegro_probe()
3887 return PTR_ERR(dev->clk_core); in allegro_probe()
3944 unsigned int clk_core; in allegro_runtime_resume() local
3952 err = regmap_read(settings, VCU_CORE_CLK, &clk_core); in allegro_runtime_resume()
3955 err = clk_set_rate(dev->clk_core, MHZ_TO_HZ(clk_core)); in allegro_runtime_resume()
3958 err = clk_prepare_enable(dev->clk_core); in allegro_runtime_resume()
3977 clk_disable_unprepare(dev->clk_core); in allegro_runtime_resume()
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/linux/include/linux/
A Dclk-provider.h38 struct clk_core;
59 struct clk_core *core;
327 struct clk_core *core;

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