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Searched refs:clk_set_phase (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/mmc/host/
A Ddw_mmc-hi3798cv200.c55 clk_set_phase(priv->drive_clk, 180); in dw_mci_hi3798cv200_set_ios()
57 clk_set_phase(priv->drive_clk, 135); in dw_mci_hi3798cv200_set_ios()
72 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
108 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
A Ddw_mmc-hi3798mv200.c68 clk_set_phase(priv->drive_clk, phase.out_deg); in dw_mci_hi3798mv200_set_ios()
69 clk_set_phase(priv->sample_clk, phase.in_deg); in dw_mci_hi3798mv200_set_ios()
109 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798mv200_execute_tuning_mix_mode()
166 clk_set_phase(priv->sample_clk, degrees[mid]); in dw_mci_hi3798mv200_execute_tuning_mix_mode()
A Ddw_mmc-rockchip.c171 return clk_set_phase(clock, degrees); in rockchip_mmc_set_phase()
A Dsunxi-mmc.c754 clk_set_phase(host->clk_sample, host->cfg->clk_delays[index].sample); in sunxi_mmc_clk_set_phase()
755 clk_set_phase(host->clk_output, host->cfg->clk_delays[index].output); in sunxi_mmc_clk_set_phase()
A Dsdhci-of-arasan.c1211 clk_set_phase(clk_data->sampleclk, in sdhci_arasan_set_clk_delays()
1213 clk_set_phase(clk_data->sdcardclk, in sdhci_arasan_set_clk_delays()
/linux/include/linux/
A Dclk.h141 int clk_set_phase(struct clk *clk, int degrees);
257 static inline long clk_set_phase(struct clk *clk, int phase) in clk_set_phase() function
/linux/sound/soc/meson/
A Daxg-tdm-interface.c257 ret = clk_set_phase(iface->lrclk, in axg_tdm_iface_set_lrclk()
297 ret = clk_set_phase(iface->sclk, in axg_tdm_iface_set_sclk()
A Daxg-tdm-formatter.c114 ret = clk_set_phase(formatter->sclk, invert ? 0 : 180); in axg_tdm_formatter_enable()
/linux/include/trace/events/
A Dclk.h217 DEFINE_EVENT(clk_phase, clk_set_phase,
/linux/drivers/mtd/nand/raw/
A Dmxic_nand.c257 ret = clk_set_phase(nfc->send_dly_clk, 9 * freq / 25000000); in mxic_nfc_clk_setup()
/linux/drivers/spi/
A Dspi-mxic.c257 ret = clk_set_phase(mxic->send_dly_clk, 9 * freq / 25000000); in mxic_spi_clk_setup()
/linux/drivers/clk/
A Dclk.c3024 int clk_set_phase(struct clk *clk, int degrees) in clk_set_phase() function
3050 EXPORT_SYMBOL_GPL(clk_set_phase);

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