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/linux/arch/arm/boot/dts/ti/omap/
A Domap3xxx-clocks.dtsi9 #clock-cells = <0>;
82 clock@68 {
121 clock@4 {
261 clock@1140 {
433 clock@d40 {
476 clock@e40 {
610 clock@d70 {
675 clock@a40 {
720 clock@c40 {
747 clock@a00 {
[all …]
A Dam43xx-clocks.dtsi9 #clock-cells = <0>;
18 #clock-cells = <0>;
40 clock-mult = <1>;
41 clock-div = <1>;
49 clock-mult = <1>;
50 clock-div = <1>;
59 clock-div = <1>;
68 clock-div = <1>;
77 clock-div = <1>;
86 clock-div = <1>;
[all …]
A Dam33xx-clocks.dtsi9 #clock-cells = <0>;
22 clock-mult = <1>;
23 clock-div = <1>;
31 clock-mult = <1>;
32 clock-div = <1>;
41 clock-div = <1>;
50 clock-div = <1>;
59 clock-div = <1>;
107 clock@664 {
566 clock@52c {
[all …]
A Ddra7xx-clocks.dtsi9 #clock-cells = <0>;
289 clock@12c {
380 clock@240 {
430 clock@1ac {
480 clock@2e4 {
542 clock@21c {
579 clock@2b4 {
670 clock@290 {
898 clock@100 {
979 clock@118 {
[all …]
A Domap54xx-clocks.dtsi9 #clock-cells = <0>;
16 #clock-cells = <0>;
25 #clock-cells = <0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
48 #clock-cells = <0>;
55 #clock-cells = <0>;
147 clock-mult = <1>;
148 clock-div = <8>;
230 clock-div = <1>;
[all …]
A Domap44xx-clocks.dtsi9 #clock-cells = <0>;
16 #clock-cells = <0>;
23 #clock-cells = <0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
46 #clock-cells = <0>;
53 #clock-cells = <0>;
62 #clock-cells = <0>;
69 #clock-cells = <0>;
186 clock-div = <8>;
[all …]
A Domap24xx-clocks.dtsi9 #clock-cells = <0>;
17 #clock-cells = <0>;
23 #clock-cells = <0>;
31 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #clock-cells = <0>;
86 clock-mult = <2>;
87 clock-div = <1>;
161 clock-div = <1>;
173 clock-div = <2>;
[all …]
A Domap34xx-omap36xx-clocks.dtsi9 #clock-cells = <0>;
12 clock-mult = <1>;
13 clock-div = <1>;
16 clock@a14 {
19 #clock-cells = <2>;
65 clock@f00 {
103 clock-div = <1>;
106 clock@a10 {
162 clock@c00 {
231 clock@a00 {
[all …]
A Domap36xx-omap3430es2plus-clocks.dtsi8 clock@a00 {
11 #clock-cells = <2>;
17 #clock-cells = <0>;
24 clock@a40 {
51 clock-mult = <1>;
52 clock-div = <2>;
55 clock@a10 {
84 clock-div = <1>;
87 clock@c00 {
175 clock@c40 {
[all …]
A Ddm814x-clocks.dtsi10 #clock-cells = <1>;
22 #clock-cells = <1>;
33 #clock-cells = <1>;
44 #clock-cells = <1>;
55 #clock-cells = <1>;
66 #clock-cells = <1>;
77 #clock-cells = <1>;
88 #clock-cells = <1>;
99 #clock-cells = <1>;
254 clock-mult = <1>;
[all …]
A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi9 #clock-cells = <0>;
12 clock-mult = <1>;
13 clock-div = <3>;
17 #clock-cells = <0>;
20 clock-mult = <1>;
21 clock-div = <5>;
56 clock-div = <3>;
137 clock@a18 {
153 clock@a10 {
169 clock@a00 {
[all …]
A Domap3430es1-clocks.dtsi9 #clock-cells = <0>;
17 #clock-cells = <0>;
26 #clock-cells = <0>;
29 clock-mult = <1>;
30 clock-div = <1>;
34 #clock-cells = <0>;
49 clock@a00 {
81 clock@a40 {
119 clock-div = <2>;
122 clock@a10 {
[all …]
A Ddm816x-clocks.dtsi5 #clock-cells = <1>;
21 #clock-cells = <1>;
33 #clock-cells = <1>;
44 #clock-cells = <1>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
71 #clock-cells = <0>;
77 #clock-cells = <0>;
86 #clock-cells = <0>;
94 #clock-cells = <0>;
[all …]
/linux/arch/mips/boot/dts/mobileye/
A Deyeq5-clocks.dtsi9 /* Fixed clock */
12 #clock-cells = <0>;
21 clock-div = <1>;
22 clock-mult = <1>;
28 clock-div = <1>;
29 clock-mult = <1>;
35 clock-div = <1>;
36 clock-mult = <1>;
42 clock-div = <1>;
49 clock-div = <1>;
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
A Dkeystone-clocks.dtsi14 #clock-cells = <0>;
24 #clock-cells = <0>;
27 clock-div = <1>;
28 clock-mult = <1>;
36 clock-div = <1>;
37 clock-mult = <1>;
65 clock-div = <2>;
74 clock-div = <3>;
83 clock-div = <3>;
92 clock-div = <4>;
[all …]
A Dkeystone-k2hk-clocks.dtsi10 #clock-cells = <0>;
19 #clock-cells = <0>;
27 #clock-cells = <0>;
36 #clock-cells = <0>;
45 #clock-cells = <0>;
54 #clock-cells = <0>;
64 #clock-cells = <0>;
74 #clock-cells = <0>;
84 #clock-cells = <0>;
94 #clock-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/st/
A Dste-nomadik-stn8815.dtsi213 clock-div = <8>;
301 clock-id = <0>;
307 clock-id = <1>;
313 clock-id = <2>;
319 clock-id = <3>;
325 clock-id = <4>;
331 clock-id = <5>;
337 clock-id = <6>;
343 clock-id = <7>;
349 clock-id = <8>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
A Dsocionext,uniphier-clock.yaml4 $id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml#
7 title: UniPhier clock controller
15 - description: System clock
17 - socionext,uniphier-ld4-clock
27 - description: Media I/O (MIO) clock, SD clock
38 - description: Peripheral clock
49 - description: SoC-glue clock
53 "#clock-cells":
60 - "#clock-cells"
64 clock-controller {
[all …]
A Dlpc1850-cgu.txt10 clock sources, controls the clock generation, and routes the outputs
11 of the clock generators through the clock source bus to the output
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
27 - #clock-cells:
34 - clock-indices:
37 - clock-output-names:
54 7 BASE_PHY_RX_CLK Base clock for Ethernet PHY Receive clock
55 8 BASE_PHY_TX_CLK Base clock for Ethernet PHY Transmit clock
70 26 BASE_CGU_OUT0_CLK Base clock for CGU_OUT0 clock output
71 27 BASE_CGU_OUT1_CLK Base clock for CGU_OUT1 clock output
[all …]
A Dmvebu-core-clock.txt5 specify the desired clock by having the clock ID in its "clocks" phandle cell.
9 1 = cpuclk (CPU clock)
12 4 = dramclk (DDR clock)
16 1 = cpuclk (CPU clock)
18 3 = ddrclk (DDR clock)
43 2 = l2clk (L2 Cache clock derived from CPU0 clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
68 - #clock-cells : from common clock binding; shall be set to 1
71 - clock-output-names : from common clock binding; allows overwrite default clock
[all …]
A Dst,stm32mp25-rcc.yaml4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
28 '#clock-cells':
50 - description: CK_SCMI_FLEXGEN_07 flexgen clock 7
51 - description: CK_SCMI_FLEXGEN_08 flexgen clock 8
114 - description: CK_SCMI_PLL3 PLL3 clock
115 - description: clk_dsi_txbyte DSI byte clock
124 - '#clock-cells'
132 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
134 rcc: clock-controller@44200000 {
[all …]
/linux/arch/arm/boot/dts/samsung/
A Dexynos5420.dtsi285 clock: clock-controller@10010000 { label
318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
330 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
342 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
788 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
966 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
975 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
984 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
995 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1005 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
[all …]
A Dexynos5410.dtsi76 clock: clock-controller@10010000 { label
132 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
144 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
340 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
347 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
354 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
361 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
394 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
411 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
A Dimx8-ss-audio.dtsi7 #include <dt-bindings/clock/imx8-clock.h>
14 #clock-cells = <0>;
21 #clock-cells = <0>;
28 #clock-cells = <0>;
35 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #clock-cells = <0>;
56 #clock-cells = <0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/clock/ti/
A Dgate.txt3 This binding uses the common clock binding[1]. This clock is
10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11 [2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml
16 "ti,gate-clock" - basic gate clock
17 "ti,wait-gate-clock" - gate clock which waits until clock is active before
19 "ti,dss-gate-clock" - gate clock with DSS specific hardware handling
20 "ti,am35xx-gate-clock" - gate clock with AM35xx specific hardware handling
27 clock
31 - #clock-cells : from common clock binding; shall be set to 0
37 - clock-output-names : from common clock binding.
[all …]

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