| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_5_ppt.c | 407 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_5_set_watermarks_table() argument
413 if (!table || !clock_ranges) in smu_v13_0_5_set_watermarks_table()
416 if (clock_ranges) { in smu_v13_0_5_set_watermarks_table()
418 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_5_set_watermarks_table()
423 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()
427 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
429 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
432 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_5_set_watermarks_table()
437 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
439 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
[all …]
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| A D | smu_v13_0_4_ppt.c | 664 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_4_set_watermarks_table() argument
670 if (!table || !clock_ranges) in smu_v13_0_4_set_watermarks_table()
674 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
679 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
681 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
683 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
685 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
688 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
693 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
695 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
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| A D | yellow_carp_ppt.c | 498 struct pp_smu_wm_range_sets *clock_ranges) in yellow_carp_set_watermarks_table() argument
504 if (!table || !clock_ranges) in yellow_carp_set_watermarks_table()
507 if (clock_ranges) { in yellow_carp_set_watermarks_table()
509 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()
514 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()
518 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
520 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
523 clock_ranges->reader_wm_sets[i].wm_inst; in yellow_carp_set_watermarks_table()
528 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
530 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
[all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| A D | renoir_ppt.c | 1081 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument
1087 if (clock_ranges) { in renoir_set_watermarks_table()
1095 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()
1099 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1101 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1104 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
1106 clock_ranges->reader_wm_sets[i].wm_type; in renoir_set_watermarks_table()
1111 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1113 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1120 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
[all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0_0_ppt.c | 483 struct pp_smu_wm_range_sets *clock_ranges) in smu_v14_0_0_set_watermarks_table() argument
489 if (!table || !clock_ranges) in smu_v14_0_0_set_watermarks_table()
493 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v14_0_0_set_watermarks_table()
498 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
500 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
502 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
504 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
507 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v14_0_0_set_watermarks_table()
512 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
514 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
[all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | vangogh_ppt.c | 1610 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument
1616 if (!table || !clock_ranges) in vangogh_set_watermarks_table()
1619 if (clock_ranges) { in vangogh_set_watermarks_table()
1621 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1626 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()
1630 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1632 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
1635 clock_ranges->reader_wm_sets[i].wm_inst; in vangogh_set_watermarks_table()
1640 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1642 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
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| A D | navi10_ppt.c | 2135 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument
2141 if (clock_ranges) { in navi10_set_watermarks_table()
2148 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
2150 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
2152 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2154 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2157 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
2162 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2164 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2166 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
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| A D | sienna_cichlid_ppt.c | 1840 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument
1846 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()
1853 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1855 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1857 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1859 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1862 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
1867 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1869 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1871 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/ |
| A D | smu_internal.h | 76 #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, c… argument
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| A D | amdgpu_smu.c | 2542 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument
2552 return smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | hardwaremanager.c | 467 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument
475 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
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| A D | smu10_hwmgr.c | 1361 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument
1364 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
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| A D | vega12_hwmgr.c | 2008 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument
2012 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
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| A D | vega20_hwmgr.c | 2949 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument
2953 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | hardwaremanager.h | 456 void *clock_ranges);
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| A D | hwmgr.h | 309 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
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| /linux/drivers/gpu/drm/amd/pm/powerplay/ |
| A D | amd_powerplay.c | 1147 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument
1151 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()
1155 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
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| /linux/drivers/gpu/drm/amd/pm/inc/ |
| A D | amdgpu_dpm.h | 573 void *clock_ranges);
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | amdgpu_smu.h | 827 struct pp_smu_wm_range_sets *clock_ranges);
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| /linux/drivers/gpu/drm/amd/include/ |
| A D | kgd_pp_interface.h | 431 void *clock_ranges);
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| /linux/drivers/gpu/drm/amd/pm/ |
| A D | amdgpu_dpm.c | 1694 void *clock_ranges) in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1704 clock_ranges); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
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