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Searched refs:clock_registers (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dni_dpm.c1194 ni_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in ni_read_clock_registers()
1195 ni_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); in ni_read_clock_registers()
1196 ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ni_read_clock_registers()
1691 cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl); in ni_populate_smc_initial_state()
1699 cpu_to_be32(ni_pi->clock_registers.mclk_pwrmgt_cntl); in ni_populate_smc_initial_state()
1701 cpu_to_be32(ni_pi->clock_registers.dll_cntl); in ni_populate_smc_initial_state()
1703 cpu_to_be32(ni_pi->clock_registers.mpll_ss1); in ni_populate_smc_initial_state()
1705 cpu_to_be32(ni_pi->clock_registers.mpll_ss2); in ni_populate_smc_initial_state()
2174 u32 dll_cntl = ni_pi->clock_registers.dll_cntl; in ni_populate_mclk_value()
2175 u32 mpll_ss1 = ni_pi->clock_registers.mpll_ss1; in ni_populate_mclk_value()
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A Dsi_dpm.c3514 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in si_read_clock_registers()
3521 si_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); in si_read_clock_registers()
4313 cpu_to_be32(si_pi->clock_registers.dll_cntl); in si_populate_smc_initial_state()
4327 cpu_to_be32(si_pi->clock_registers.mpll_ss1); in si_populate_smc_initial_state()
4329 cpu_to_be32(si_pi->clock_registers.mpll_ss2); in si_populate_smc_initial_state()
4434 u32 dll_cntl = si_pi->clock_registers.dll_cntl; in si_populate_smc_acpi_state()
4529 cpu_to_be32(si_pi->clock_registers.mpll_ss1); in si_populate_smc_acpi_state()
4531 cpu_to_be32(si_pi->clock_registers.mpll_ss2); in si_populate_smc_acpi_state()
4819 u32 dll_cntl = si_pi->clock_registers.dll_cntl; in si_populate_mclk_value()
4826 u32 mpll_ss1 = si_pi->clock_registers.mpll_ss1; in si_populate_mclk_value()
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A Dci_dpm.c1832 pi->clock_registers.cg_spll_func_cntl = in ci_read_clock_registers()
1834 pi->clock_registers.cg_spll_func_cntl_2 = in ci_read_clock_registers()
1836 pi->clock_registers.cg_spll_func_cntl_3 = in ci_read_clock_registers()
1838 pi->clock_registers.cg_spll_func_cntl_4 = in ci_read_clock_registers()
1840 pi->clock_registers.cg_spll_spread_spectrum = in ci_read_clock_registers()
1842 pi->clock_registers.cg_spll_spread_spectrum_2 = in ci_read_clock_registers()
1844 pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in ci_read_clock_registers()
2751 u32 dll_cntl = pi->clock_registers.dll_cntl; in ci_calculate_mclk_params()
2758 u32 mpll_ss1 = pi->clock_registers.mpll_ss1; in ci_calculate_mclk_params()
2759 u32 mpll_ss2 = pi->clock_registers.mpll_ss2; in ci_calculate_mclk_params()
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A Dsi_dpm.h147 struct si_clock_registers clock_registers; member
A Dni_dpm.h177 struct ni_clock_registers clock_registers; member
A Dci_dpm.h198 struct ci_clock_registers clock_registers; member
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Diceland_smumgr.c1054 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in iceland_calculate_mclk_params()
1061 uint32_t mpll_ss1 = data->clock_registers.vMPLL_SS1; in iceland_calculate_mclk_params()
1062 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; in iceland_calculate_mclk_params()
1433 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in iceland_populate_smc_acpi_level()
1533 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL); in iceland_populate_smc_acpi_level()
1535 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); in iceland_populate_smc_acpi_level()
1537 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in iceland_populate_smc_acpi_level()
1539 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1); in iceland_populate_smc_acpi_level()
1541 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2); in iceland_populate_smc_acpi_level()
1543 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in iceland_populate_smc_acpi_level()
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A Dci_smumgr.c1032 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in ci_calculate_mclk_params()
1039 uint32_t mpll_ss1 = data->clock_registers.vMPLL_SS1; in ci_calculate_mclk_params()
1040 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; in ci_calculate_mclk_params()
1387 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in ci_populate_smc_acpi_level()
1487 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL); in ci_populate_smc_acpi_level()
1489 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); in ci_populate_smc_acpi_level()
1491 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in ci_populate_smc_acpi_level()
1493 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1); in ci_populate_smc_acpi_level()
1495 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2); in ci_populate_smc_acpi_level()
1497 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in ci_populate_smc_acpi_level()
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A Dtonga_smumgr.c797 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in tonga_calculate_mclk_params()
804 uint32_t mpll_ss1 = data->clock_registers.vMPLL_SS1; in tonga_calculate_mclk_params()
805 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; in tonga_calculate_mclk_params()
1185 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in tonga_populate_smc_acpi_level()
1275 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL); in tonga_populate_smc_acpi_level()
1277 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); in tonga_populate_smc_acpi_level()
1279 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in tonga_populate_smc_acpi_level()
1281 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1); in tonga_populate_smc_acpi_level()
1283 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2); in tonga_populate_smc_acpi_level()
1285 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in tonga_populate_smc_acpi_level()
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A Dfiji_smumgr.c860 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_calculate_sclk_params()
861 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in fiji_calculate_sclk_params()
862 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in fiji_calculate_sclk_params()
863 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in fiji_calculate_sclk_params()
864 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in fiji_calculate_sclk_params()
1307 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_populate_smc_acpi_level()
1308 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; in fiji_populate_smc_acpi_level()
1352 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in fiji_populate_smc_acpi_level()
1353 table->ACPILevel.CgSpllFuncCntl4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in fiji_populate_smc_acpi_level()
1354 table->ACPILevel.SpllSpreadSpectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in fiji_populate_smc_acpi_level()
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/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
A Dsi_dpm.c4032 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in si_read_clock_registers()
4039 si_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); in si_read_clock_registers()
4836 cpu_to_be32(si_pi->clock_registers.dll_cntl); in si_populate_smc_initial_state()
4850 cpu_to_be32(si_pi->clock_registers.mpll_ss1); in si_populate_smc_initial_state()
4852 cpu_to_be32(si_pi->clock_registers.mpll_ss2); in si_populate_smc_initial_state()
4980 u32 dll_cntl = si_pi->clock_registers.dll_cntl; in si_populate_smc_acpi_state()
5076 cpu_to_be32(si_pi->clock_registers.mpll_ss1); in si_populate_smc_acpi_state()
5078 cpu_to_be32(si_pi->clock_registers.mpll_ss2); in si_populate_smc_acpi_state()
5365 u32 dll_cntl = si_pi->clock_registers.dll_cntl; in si_populate_mclk_value()
5372 u32 mpll_ss1 = si_pi->clock_registers.mpll_ss1; in si_populate_mclk_value()
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A Dsi_dpm.h828 struct ni_clock_registers clock_registers; member
968 struct si_clock_registers clock_registers; member
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu7_hwmgr.h227 struct smu7_clock_registers clock_registers; member
A Dsmu7_hwmgr.c4797 data->clock_registers.vCG_SPLL_FUNC_CNTL = in smu7_read_clock_registers()
4799 data->clock_registers.vCG_SPLL_FUNC_CNTL_2 = in smu7_read_clock_registers()
4801 data->clock_registers.vCG_SPLL_FUNC_CNTL_3 = in smu7_read_clock_registers()
4803 data->clock_registers.vCG_SPLL_FUNC_CNTL_4 = in smu7_read_clock_registers()
4805 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM = in smu7_read_clock_registers()
4807 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2 = in smu7_read_clock_registers()
4809 data->clock_registers.vDLL_CNTL = in smu7_read_clock_registers()
4811 data->clock_registers.vMCLK_PWRMGT_CNTL = in smu7_read_clock_registers()
4813 data->clock_registers.vMPLL_AD_FUNC_CNTL = in smu7_read_clock_registers()
4815 data->clock_registers.vMPLL_DQ_FUNC_CNTL = in smu7_read_clock_registers()
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