Home
last modified time | relevance | path

Searched refs:cptpf (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
A Dotx2_cptpf_main.c195 queue_work(cptpf->flr_wq, &cptpf->flr_work[dev].work); in cptpf_vf_flr_intr()
251 cptpf); in cptpf_register_vfpf_intr()
286 cptpf); in cptpf_register_vfpf_intr()
295 cptpf); in cptpf_register_vfpf_intr()
348 cptpf->flr_work[vf].pf = cptpf; in cptpf_flr_wq_init()
389 cptpf->pdev, cptpf->reg_base, MBOX_DIR_PFVF, in cptpf_vfpf_mbox_init()
396 cptpf->vf[i].cptpf = cptpf; in cptpf_vfpf_mbox_init()
687 ret = otx2_cpt_create_eng_grps(cptpf, &cptpf->eng_grps); in cptpf_sriov_enable()
727 cptpf = devm_kzalloc(dev, sizeof(*cptpf), GFP_KERNEL); in otx2_cptpf_probe()
728 if (!cptpf) in otx2_cptpf_probe()
[all …]
A Dotx2_cptpf_mbox.c35 mutex_lock(&cptpf->lock); in forward_to_af()
193 if (cptpf->has_cpt1) { in rx_inline_ipsec_lf_cfg()
267 otx2_cptlf_set_dev_info(&cptpf->lfs, cptpf->pdev, cptpf->reg_base, in handle_msg_rx_inline_ipsec_lf_cfg()
273 ret = otx2_inline_cptlf_setup(cptpf, &cptpf->lfs, egrp, num_lfs); in handle_msg_rx_inline_ipsec_lf_cfg()
279 if (cptpf->has_cpt1) { in handle_msg_rx_inline_ipsec_lf_cfg()
281 otx2_cptlf_set_dev_info(&cptpf->cpt1_lfs, cptpf->pdev, in handle_msg_rx_inline_ipsec_lf_cfg()
282 cptpf->reg_base, &cptpf->afpf_mbox, in handle_msg_rx_inline_ipsec_lf_cfg()
287 ret = otx2_inline_cptlf_setup(cptpf, &cptpf->cpt1_lfs, egrp, in handle_msg_rx_inline_ipsec_lf_cfg()
387 cptpf = vf->cptpf; in otx2_cptpf_vfpf_mbox_handler()
439 queue_work(cptpf->afpf_mbox_wq, &cptpf->afpf_mbox_work); in otx2_cptpf_afpf_mbox_intr()
[all …]
A Dotx2_cpt_devlink.c11 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; in otx2_cpt_dl_egrp_create() local
21 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; in otx2_cpt_dl_egrp_delete() local
38 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; in otx2_cpt_dl_t106_mode_get() local
39 struct pci_dev *pdev = cptpf->pdev; in otx2_cpt_dl_t106_mode_get()
54 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; in otx2_cpt_dl_t106_mode_set() local
55 struct pci_dev *pdev = cptpf->pdev; in otx2_cpt_dl_t106_mode_set()
58 if (cptpf->enabled_vfs != 0 || cptpf->eng_grps.is_grps_created) in otx2_cpt_dl_t106_mode_set()
120 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; in otx2_cpt_devlink_info_get() local
157 cpt_dl->cptpf = cptpf; in otx2_cpt_register_dl()
158 cptpf->dl = dl; in otx2_cpt_register_dl()
[all …]
A Dotx2_cptpf_ucode.c163 return otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in __write_ucode_base()
176 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_set_ucode_base()
228 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_detach_and_disable_cores()
238 cptpf->pdev, in cptx_detach_and_disable_cores()
255 cptpf->pdev, in cptx_detach_and_disable_cores()
314 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
334 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
340 return otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_attach_and_enable_cores()
1289 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_disable_all_cores()
1325 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_disable_all_cores()
[all …]
A Dcn10k_cpt.c48 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf) in cn10k_cptpf_lmtst_init() argument
50 struct pci_dev *pdev = cptpf->pdev; in cn10k_cptpf_lmtst_init()
54 if (!test_bit(CN10K_LMTST, &cptpf->cap_flag)) { in cn10k_cptpf_lmtst_init()
55 cptpf->lfs.ops = &otx2_hw_ops; in cn10k_cptpf_lmtst_init()
59 cptpf->lfs.ops = &cn10k_hw_ops; in cn10k_cptpf_lmtst_init()
60 lmt_base = readq(cptpf->reg_base + RVU_PF_LMTLINE_ADDR); in cn10k_cptpf_lmtst_init()
66 size -= ((1 + cptpf->max_vfs) * MBOX_SIZE); in cn10k_cptpf_lmtst_init()
67 cptpf->lfs.lmt_base = devm_ioremap_wc(&pdev->dev, lmt_base, size); in cn10k_cptpf_lmtst_init()
68 if (!cptpf->lfs.lmt_base) { in cn10k_cptpf_lmtst_init()
A Dotx2_cptpf_ucode.h160 int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
162 int otx2_cpt_disable_all_cores(struct otx2_cptpf_dev *cptpf);
164 int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf);
165 int otx2_cpt_dl_custom_egrp_create(struct otx2_cptpf_dev *cptpf,
167 int otx2_cpt_dl_custom_egrp_delete(struct otx2_cptpf_dev *cptpf,
169 void otx2_cpt_print_uc_dbg_info(struct otx2_cptpf_dev *cptpf);
A Dotx2_cpt_devlink.h13 struct otx2_cptpf_dev *cptpf; member
17 int otx2_cpt_register_dl(struct otx2_cptpf_dev *cptpf);
18 void otx2_cpt_unregister_dl(struct otx2_cptpf_dev *cptpf);
A Dotx2_cptpf.h14 struct otx2_cptpf_dev *cptpf; /* PF pointer this VF belongs to */ member
74 int otx2_inline_cptlf_setup(struct otx2_cptpf_dev *cptpf,
A Dcn10k_cpt.h51 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf);
/linux/drivers/crypto/cavium/cpt/
A DMakefile2 obj-$(CONFIG_CAVIUM_CPT) += cptpf.o cptvf.o
3 cptpf-objs := cptpf_main.o cptpf_mbox.o

Completed in 24 milliseconds