Searched refs:cpu_reg (Results 1 – 10 of 10) sorted by relevance
| /linux/arch/arm64/kvm/hyp/nvhe/ |
| A D | hyp-main.c | 184 cpu_reg(host_ctxt, 1) = ret; in handle___kvm_vcpu_run()
243 __kvm_timer_set_cntvoff(cpu_reg(host_ctxt, 1)); in handle___kvm_timer_set_cntvoff()
257 cpu_reg(host_ctxt, 1) = __vgic_v3_get_gic_config(); in handle___vgic_v3_get_gic_config()
267 cpu_reg(host_ctxt, 1) = __kvm_get_mdcr_el2(); in handle___kvm_get_mdcr_el2()
305 cpu_reg(host_ctxt, 1) = pkvm_cpu_set_vector(slot); in handle___pkvm_cpu_set_vector()
312 cpu_reg(host_ctxt, 1) = __pkvm_host_share_hyp(pfn); in handle___pkvm_host_share_hyp()
344 cpu_reg(host_ctxt, 1) = haddr; in handle___pkvm_create_private_mapping()
349 cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize(); in handle___pkvm_prot_finalize()
383 cpu_reg(host_ctxt, 1) = __pkvm_teardown_vm(handle); in handle___pkvm_teardown_vm()
448 cpu_reg(host_ctxt, 0) = SMCCC_RET_SUCCESS; in handle_host_hcall()
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| A D | psci-relay.c | 74 return psci_call(cpu_reg(host_ctxt, 0), cpu_reg(host_ctxt, 1), in psci_forward()
75 cpu_reg(host_ctxt, 2), cpu_reg(host_ctxt, 3)); in psci_forward()
215 cpu_reg(host_ctxt, 0) = boot_args->r0; in __kvm_host_psci_cpu_entry()
298 cpu_reg(host_ctxt, 0) = ret; in kvm_host_psci_handler()
299 cpu_reg(host_ctxt, 1) = 0; in kvm_host_psci_handler()
300 cpu_reg(host_ctxt, 2) = 0; in kvm_host_psci_handler()
301 cpu_reg(host_ctxt, 3) = 0; in kvm_host_psci_handler()
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| A D | ffa.c | 100 cpu_reg(ctxt, 0) = res->a0; in ffa_set_retval()
101 cpu_reg(ctxt, 1) = res->a1; in ffa_set_retval()
102 cpu_reg(ctxt, 2) = res->a2; in ffa_set_retval()
103 cpu_reg(ctxt, 3) = res->a3; in ffa_set_retval()
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| A D | setup.c | 332 cpu_reg(host_ctxt, 1) = ret; in __pkvm_init_finalise()
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| /linux/drivers/net/ethernet/broadcom/ |
| A D | bnx2_fw.h | 12 static const struct cpu_reg cpu_reg_com = {
28 static const struct cpu_reg cpu_reg_cp = {
44 static const struct cpu_reg cpu_reg_rxp = {
60 static const struct cpu_reg cpu_reg_tpat = {
76 static const struct cpu_reg cpu_reg_txp = {
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| A D | bnx2.c | 3832 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, in load_cpu_fw() argument
3842 val |= cpu_reg->mode_value_halt; in load_cpu_fw()
3843 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw()
3844 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw()
3852 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3866 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3880 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3889 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw()
3892 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw()
3896 val &= ~cpu_reg->mode_value_halt; in load_cpu_fw()
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| A D | bnx2.h | 7015 struct cpu_reg { struct
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| /linux/arch/arm64/kvm/hyp/include/nvhe/ |
| A D | trap_handler.h | 14 #define cpu_reg(ctxt, r) (ctxt)->regs.regs[r] macro
16 type name = (type)cpu_reg(ctxt, (reg))
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| /linux/Documentation/devicetree/bindings/cpufreq/ |
| A D | nvidia,tegra20-cpufreq.txt | 30 cpu_reg: regulator0 {
53 cpu-supply = <&cpu_reg>;
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| /linux/drivers/cpufreq/ |
| A D | mediatek-cpufreq-hw.c | 304 struct regulator *cpu_reg; in mtk_cpufreq_hw_driver_probe() local
313 cpu_reg = devm_regulator_get(cpu_dev, "cpu"); in mtk_cpufreq_hw_driver_probe()
314 if (IS_ERR(cpu_reg)) in mtk_cpufreq_hw_driver_probe()
315 return dev_err_probe(&pdev->dev, PTR_ERR(cpu_reg), in mtk_cpufreq_hw_driver_probe()
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