Home
last modified time | relevance | path

Searched refs:csc (Results 1 – 25 of 79) sorted by relevance

1234

/linux/drivers/gpu/ipu-v3/
A Dipu-ic-csc.c355 static int calc_csc_coeffs(struct ipu_ic_csc *csc) in calc_csc_coeffs() argument
360 tbl_idx = (QUANT_MAP(csc->in_cs.quant) << 1) | in calc_csc_coeffs()
361 QUANT_MAP(csc->out_cs.quant); in calc_csc_coeffs()
363 if (csc->in_cs.cs == csc->out_cs.cs) { in calc_csc_coeffs()
364 csc->params = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? in calc_csc_coeffs()
372 switch (csc->out_cs.enc) { in calc_csc_coeffs()
385 csc->params = *params_tbl[tbl_idx]; in calc_csc_coeffs()
390 int __ipu_ic_calc_csc(struct ipu_ic_csc *csc) in __ipu_ic_calc_csc() argument
392 return calc_csc_coeffs(csc); in __ipu_ic_calc_csc()
396 int ipu_ic_calc_csc(struct ipu_ic_csc *csc, in ipu_ic_calc_csc() argument
[all …]
A Dipu-ic.c175 const struct ipu_ic_csc *csc, in init_csc() argument
188 c = (const u16 (*)[3])csc->params.coeff; in init_csc()
189 a = (const u16 *)csc->params.offset; in init_csc()
195 param = ((a[0] & 0x1fe0) >> 5) | (csc->params.scale << 8) | in init_csc()
196 (csc->params.sat << 10); in init_csc()
398 const struct ipu_ic_csc *csc, in ipu_ic_task_init_rsc() argument
432 ic->in_cs = csc->in_cs; in ipu_ic_task_init_rsc()
433 ic->out_cs = csc->out_cs; in ipu_ic_task_init_rsc()
435 ret = init_csc(ic, csc, 0); in ipu_ic_task_init_rsc()
442 const struct ipu_ic_csc *csc, in ipu_ic_task_init() argument
[all …]
A Dipu-dp.c273 u32 reg, csc; in ipu_dp_disable_channel() local
283 csc = reg & DP_COM_CONF_CSC_DEF_MASK; in ipu_dp_disable_channel()
285 if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG) in ipu_dp_disable_channel()
/linux/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/
A Dia_css_csc.host.c73 if (!csc) return; in ia_css_cc_dump()
77 csc->m_shift); in ia_css_cc_dump()
80 csc->m00); in ia_css_cc_dump()
83 csc->m01); in ia_css_cc_dump()
86 csc->m02); in ia_css_cc_dump()
89 csc->m10); in ia_css_cc_dump()
92 csc->m11); in ia_css_cc_dump()
95 csc->m12); in ia_css_cc_dump()
98 csc->m20); in ia_css_cc_dump()
101 csc->m21); in ia_css_cc_dump()
[all …]
A Dia_css_csc.host.h39 const struct sh_css_isp_csc_params *csc, unsigned int level,
44 const struct sh_css_isp_csc_params *csc,
/linux/drivers/media/platform/ti/vpe/
A Dcsc.c112 struct device *dev = &csc->pdev->dev; in csc_dump_regs()
115 ioread32(csc->base + CSC_##r)) in csc_dump_regs()
249 struct csc_data *csc; in csc_create() local
253 csc = devm_kzalloc(&pdev->dev, sizeof(*csc), GFP_KERNEL); in csc_create()
254 if (!csc) { in csc_create()
259 csc->pdev = pdev; in csc_create()
263 if (csc->res == NULL) { in csc_create()
269 csc->base = devm_ioremap_resource(&pdev->dev, csc->res); in csc_create()
270 if (IS_ERR(csc->base)) in csc_create()
271 return ERR_CAST(csc->base); in csc_create()
[all …]
A DMakefile5 obj-$(CONFIG_VIDEO_TI_CSC) += ti-csc.o
10 ti-csc-y := csc.o
A Dcsc.h58 void csc_dump_regs(struct csc_data *csc);
59 void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5);
60 void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0,
/linux/drivers/gpu/drm/i915/display/
A Dintel_color.c174 memset(csc, 0, sizeof(*csc)); in intel_csc_clear()
219 csc->coeff[0] << 16 | csc->coeff[1]); in ilk_update_pipe_csc()
224 csc->coeff[3] << 16 | csc->coeff[4]); in ilk_update_pipe_csc()
229 csc->coeff[6] << 16 | csc->coeff[7]); in ilk_update_pipe_csc()
318 csc->coeff[0] << 16 | csc->coeff[1]); in icl_update_output_csc()
323 csc->coeff[3] << 16 | csc->coeff[4]); in icl_update_output_csc()
328 csc->coeff[6] << 16 | csc->coeff[7]); in icl_update_output_csc()
621 csc->coeff[1] << 16 | csc->coeff[0]); in vlv_load_wgc_csc()
626 csc->coeff[4] << 16 | csc->coeff[3]); in vlv_load_wgc_csc()
631 csc->coeff[7] << 16 | csc->coeff[6]); in vlv_load_wgc_csc()
[all …]
A Dintel_crtc_state_dump.c151 const struct intel_csc_matrix *csc) in ilk_dump_csc() argument
156 csc->preoff[0], csc->preoff[1], csc->preoff[2]); in ilk_dump_csc()
160 csc->coeff[3 * i + 0], in ilk_dump_csc()
161 csc->coeff[3 * i + 1], in ilk_dump_csc()
162 csc->coeff[3 * i + 2]); in ilk_dump_csc()
168 csc->postoff[0], csc->postoff[1], csc->postoff[2]); in ilk_dump_csc()
173 const struct intel_csc_matrix *csc) in vlv_dump_csc() argument
179 csc->coeff[3 * i + 0], in vlv_dump_csc()
180 csc->coeff[3 * i + 1], in vlv_dump_csc()
181 csc->coeff[3 * i + 2]); in vlv_dump_csc()
[all …]
/linux/drivers/gpu/drm/tidss/
A Dtidss_dispc.c1471 regval[0] = CVAL(csc->m[CSC_YR], csc->m[CSC_YG]); in dispc_csc_rgb2yuv_regval()
1483 regval[0] = CVAL(csc->m[CSC_RR], csc->m[CSC_RG]); in dispc_csc_cpr_regval()
1484 regval[1] = CVAL(csc->m[CSC_RB], csc->m[CSC_GR]); in dispc_csc_cpr_regval()
1485 regval[2] = CVAL(csc->m[CSC_GG], csc->m[CSC_GB]); in dispc_csc_cpr_regval()
1486 regval[3] = CVAL(csc->m[CSC_BR], csc->m[CSC_BG]); in dispc_csc_cpr_regval()
1506 csc->to_regval(csc, regval); in dispc_k2g_vid_write_csc()
1529 csc->to_regval(csc, regval); in dispc_k3_vid_write_csc()
2523 regval[0] = CVAL(csc->m[CSC_BB], csc->m[CSC_BG], csc->m[CSC_BR]); in dispc_k2g_vp_csc_cpr_regval()
2524 regval[1] = CVAL(csc->m[CSC_GB], csc->m[CSC_GG], csc->m[CSC_GR]); in dispc_k2g_vp_csc_cpr_regval()
2525 regval[2] = CVAL(csc->m[CSC_RB], csc->m[CSC_RG], csc->m[CSC_RR]); in dispc_k2g_vp_csc_cpr_regval()
[all …]
/linux/drivers/gpu/drm/msm/disp/mdp4/
A Dmdp4_plane.c166 enum mdp4_pipe pipe, struct csc_cfg *csc) in mdp4_write_csc_config() argument
170 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { in mdp4_write_csc_config()
172 csc->matrix[i]); in mdp4_write_csc_config()
175 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { in mdp4_write_csc_config()
177 csc->pre_bias[i]); in mdp4_write_csc_config()
180 csc->post_bias[i]); in mdp4_write_csc_config()
183 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { in mdp4_write_csc_config()
185 csc->pre_clamp[i]); in mdp4_write_csc_config()
188 csc->post_clamp[i]); in mdp4_write_csc_config()
322 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); in mdp4_plane_mode_set() local
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_cdm.c175 u32 csc = 0; in dpu_hw_cdm_enable() local
195 csc |= CDM_CSC10_OP_MODE_DST_FMT_YUV; in dpu_hw_cdm_enable()
196 csc &= ~CDM_CSC10_OP_MODE_SRC_FMT_YUV; in dpu_hw_cdm_enable()
197 csc |= CDM_CSC10_OP_MODE_EN; in dpu_hw_cdm_enable()
202 DPU_REG_WRITE(c, CDM_CSC_10_OPMODE, csc); in dpu_hw_cdm_enable()
/linux/drivers/gpu/drm/nouveau/dispnv50/
A Dwndw.c136 if (clr.csc ) wndw->func-> csc_clr(wndw); in nv50_wndw_flush_clr()
164 if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw); in nv50_wndw_flush_set()
421 if (wndw->func->csc && asyh->state.ctm) { in nv50_wndw_atomic_check_lut()
423 wndw->func->csc(wndw, asyw, ctm); in nv50_wndw_atomic_check_lut()
424 asyw->csc.valid = true; in nv50_wndw_atomic_check_lut()
425 asyw->set.csc = true; in nv50_wndw_atomic_check_lut()
427 asyw->csc.valid = false; in nv50_wndw_atomic_check_lut()
428 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check_lut()
509 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check()
608 asyw->csc = armw->csc; in nv50_wndw_atomic_duplicate_state()
A Dbase907c.c144 u32 *val = &asyw->csc.matrix[j * 4 + i]; in base907c_csc()
181 NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]), in base907c_csc_set()
183 SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11); in base907c_csc_set()
198 .csc = base907c_csc,
/linux/drivers/pcmcia/
A Di82092.c310 int csc; in i82092aa_interrupt() local
317 csc = indirect_read(i, I365_CSC); in i82092aa_interrupt()
319 if (csc == 0) /* no events on this socket */ in i82092aa_interrupt()
324 if (csc & I365_CSC_DETECT) { in i82092aa_interrupt()
332 if (csc & I365_CSC_STSCHG) in i82092aa_interrupt()
336 if (csc & I365_CSC_BVD1) in i82092aa_interrupt()
338 if (csc & I365_CSC_BVD2) in i82092aa_interrupt()
340 if (csc & I365_CSC_READY) in i82092aa_interrupt()
A Dpd6729.c192 unsigned int csc; in pd6729_interrupt() local
195 csc = indirect_read(&socket[i], I365_CSC); in pd6729_interrupt()
196 if (csc == 0) /* no events on this socket */ in pd6729_interrupt()
202 if (csc & I365_CSC_DETECT) { in pd6729_interrupt()
211 events |= (csc & I365_CSC_STSCHG) in pd6729_interrupt()
215 events |= (csc & I365_CSC_BVD1) in pd6729_interrupt()
217 events |= (csc & I365_CSC_BVD2) in pd6729_interrupt()
219 events |= (csc & I365_CSC_READY) in pd6729_interrupt()
/linux/drivers/staging/media/deprecated/atmel/
A Datmel-sama5d2-isc.c202 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama5d2_config_csc()
204 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama5d2_config_csc()
206 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama5d2_config_csc()
208 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama5d2_config_csc()
210 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama5d2_config_csc()
212 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama5d2_config_csc()
440 isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; in atmel_isc_probe()
A Datmel-sama7g5-isc.c215 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama7g5_config_csc()
217 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama7g5_config_csc()
219 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama7g5_config_csc()
221 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama7g5_config_csc()
223 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama7g5_config_csc()
225 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama7g5_config_csc()
429 isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET; in microchip_xisc_probe()
/linux/drivers/media/platform/microchip/
A Dmicrochip-sama5d2-isc.c222 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama5d2_config_csc()
224 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama5d2_config_csc()
226 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama5d2_config_csc()
228 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama5d2_config_csc()
230 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama5d2_config_csc()
232 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama5d2_config_csc()
459 isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; in microchip_isc_probe()
A Dmicrochip-sama7g5-isc.c235 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama7g5_config_csc()
237 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama7g5_config_csc()
239 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama7g5_config_csc()
241 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama7g5_config_csc()
243 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama7g5_config_csc()
245 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama7g5_config_csc()
448 isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET; in microchip_xisc_probe()
/linux/Documentation/userspace-api/media/v4l/
A Dvidioc-subdev-enum-mbus-code.rst118 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
125 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
132 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
139 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
146 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
/linux/drivers/gpu/drm/msm/disp/mdp5/
A Dmdp5_plane.c501 struct csc_cfg *csc) in csc_enable() argument
506 if (unlikely(!csc)) in csc_enable()
509 if ((csc->type == CSC_YUV2RGB) || (CSC_YUV2YUV == csc->type)) in csc_enable()
511 if ((csc->type == CSC_RGB2YUV) || (CSC_YUV2YUV == csc->type)) in csc_enable()
516 matrix = csc->matrix; in csc_enable()
532 for (i = 0; i < ARRAY_SIZE(csc->pre_bias); i++) { in csc_enable()
533 uint32_t *pre_clamp = csc->pre_clamp; in csc_enable()
534 uint32_t *post_clamp = csc->post_clamp; in csc_enable()
545 MDP5_PIPE_CSC_1_PRE_BIAS_REG_VALUE(csc->pre_bias[i])); in csc_enable()
548 MDP5_PIPE_CSC_1_POST_BIAS_REG_VALUE(csc->post_bias[i])); in csc_enable()
/linux/Documentation/devicetree/bindings/media/
A Dti,vpe.yaml33 - const: csc
59 "csc",
/linux/drivers/media/platform/ti/omap3isp/
A Disppreview.c400 const struct omap3isp_prev_csc *csc = &params->csc; in preview_config_csc() local
403 val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT; in preview_config_csc()
404 val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT; in preview_config_csc()
405 val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT; in preview_config_csc()
408 val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT; in preview_config_csc()
413 val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT; in preview_config_csc()
418 val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT; in preview_config_csc()
800 offsetof(struct prev_params, csc),
801 sizeof_field(struct prev_params, csc),
802 offsetof(struct omap3isp_prev_update_config, csc),
[all …]

Completed in 64 milliseconds

1234