| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_mqd_manager.c | 102 struct amdgpu_cu_info *cu_info = &mm->dev->adev->gfx.cu_info; in mqd_symmetrically_map_cu_mask() local 112 cu_active_per_node = cu_info->number / mm->dev->kfd->num_nodes; in mqd_symmetrically_map_cu_mask() 150 cu_info->bitmap[xcc_inst][se % 4][sh + (se / 4) * in mqd_symmetrically_map_cu_mask()
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| A D | kfd_crat.c | 2206 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; in kfd_create_vcrat_image_gpu() local 2248 cu->num_simd_per_cu = cu_info->simd_per_cu; in kfd_create_vcrat_image_gpu() 2249 cu->num_simd_cores = cu_info->simd_per_cu * in kfd_create_vcrat_image_gpu() 2250 (cu_info->number / kdev->kfd->num_nodes); in kfd_create_vcrat_image_gpu() 2251 cu->max_waves_simd = cu_info->max_waves_per_simd; in kfd_create_vcrat_image_gpu() 2253 cu->wave_front_size = cu_info->wave_front_size; in kfd_create_vcrat_image_gpu() 2259 cu->max_slots_scatch_cu = cu_info->max_scratch_slots_per_cu; in kfd_create_vcrat_image_gpu() 2261 cu->lds_size_in_kb = cu_info->lds_size; in kfd_create_vcrat_image_gpu()
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| A D | kfd_topology.c | 1681 struct amdgpu_cu_info *cu_info, in fill_in_l2_l3_pcache() argument 1696 cu_sibling_map_mask = cu_info->bitmap[start][0][0]; in fill_in_l2_l3_pcache() 1751 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4]; in fill_in_l2_l3_pcache() 1776 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; in kfd_fill_cache_non_crat_info() local 1816 cu_info->bitmap[xcc][i % 4][j + i / 4], ct, in kfd_fill_cache_non_crat_info() 1839 cu_info, gfx_info, ct, cu_processor_id, kdev); in kfd_fill_cache_non_crat_info() 2025 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info; in kfd_topology_add_device() local 2151 cu_info->simd_per_cu * cu_info->number; in kfd_topology_add_device()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_atomfirmware.c | 837 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info() 838 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info() 839 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info() 840 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info() 853 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v27.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info() 854 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v27.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info() 855 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v27.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info() 856 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v27.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
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| A D | gfx_v9_4_2.c | 522 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init() 532 adev->gfx.cu_info.number * SIMD_ID_MAX * 2, in gfx_v9_4_2_do_sgprs_init() 547 adev->gfx.cu_info.number * 2, in gfx_v9_4_2_do_sgprs_init() 556 pattern[1], adev->gfx.cu_info.number * SIMD_ID_MAX * 6, in gfx_v9_4_2_do_sgprs_init() 587 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init() 597 adev->gfx.cu_info.number * SIMD_ID_MAX * 4, in gfx_v9_4_2_do_sgprs_init() 665 adev->gfx.cu_info.number, in gfx_v9_4_2_do_vgprs_init() 682 adev->gfx.cu_info.number * SIMD_ID_MAX, in gfx_v9_4_2_do_vgprs_init() 1817 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_4_2_log_cu_timeout_status() local 1829 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status() [all …]
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| A D | gfx_v7_0.c | 5134 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v7_0_get_cu_info() local 5143 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v7_0_get_cu_info() 5158 cu_info->bitmap[0][i][j] = bitmap; in gfx_v7_0_get_cu_info() 5171 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v7_0_get_cu_info() 5177 cu_info->number = active_cu_number; in gfx_v7_0_get_cu_info() 5178 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v7_0_get_cu_info() 5179 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v7_0_get_cu_info() 5180 cu_info->max_waves_per_simd = 10; in gfx_v7_0_get_cu_info() 5181 cu_info->max_scratch_slots_per_cu = 32; in gfx_v7_0_get_cu_info() 5182 cu_info->wave_front_size = 64; in gfx_v7_0_get_cu_info() [all …]
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| A D | amdgpu_kms.c | 910 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl() 911 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl() 913 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl() 914 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl() 915 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl() 922 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
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| A D | amdgpu_discovery.c | 1540 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info() 1541 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info() 1542 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info() 1543 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info() 1584 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info() 1585 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info() 1586 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info() 1587 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
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| A D | gfx_v6_0.c | 2746 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v6_0_init_ao_cu_mask() 2750 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v6_0_init_ao_cu_mask() 3557 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v6_0_get_cu_info() local 3566 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v6_0_get_cu_info() 3581 cu_info->bitmap[0][i][j] = bitmap; in gfx_v6_0_get_cu_info() 3594 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v6_0_get_cu_info() 3601 cu_info->number = active_cu_number; in gfx_v6_0_get_cu_info() 3602 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v6_0_get_cu_info()
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| A D | gfx_v8_0.c | 7160 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v8_0_get_cu_info() local 7164 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v8_0_get_cu_info() 7184 cu_info->bitmap[0][i][j] = bitmap; in gfx_v8_0_get_cu_info() 7197 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v8_0_get_cu_info() 7203 cu_info->number = active_cu_number; in gfx_v8_0_get_cu_info() 7204 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v8_0_get_cu_info() 7205 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v8_0_get_cu_info() 7206 cu_info->max_waves_per_simd = 10; in gfx_v8_0_get_cu_info() 7207 cu_info->max_scratch_slots_per_cu = 32; in gfx_v8_0_get_cu_info() 7208 cu_info->wave_front_size = 64; in gfx_v8_0_get_cu_info() [all …]
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| A D | gfx_v9_0.c | 886 struct amdgpu_cu_info *cu_info); 1656 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_0_init_always_on_cu_mask() local 1678 if (cu_info->bitmap[0][i][j] & mask) { in gfx_v9_0_init_always_on_cu_mask() 1691 cu_info->ao_cu_bitmap[i][j] = cu_bitmap; in gfx_v9_0_init_always_on_cu_mask() 2616 gfx_v9_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_0_constants_init() 7782 struct amdgpu_cu_info *cu_info) in gfx_v9_0_get_cu_info() argument 7788 if (!adev || !cu_info) in gfx_v9_0_get_cu_info() 7825 cu_info->bitmap[0][i % 4][j + i / 4] = bitmap; in gfx_v9_0_get_cu_info() 7844 cu_info->number = active_cu_number; in gfx_v9_0_get_cu_info() 7845 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v9_0_get_cu_info() [all …]
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| A D | gfx_v9_4_3.c | 166 struct amdgpu_cu_info *cu_info); 1330 gfx_v9_4_3_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_4_3_constants_init() 4922 struct amdgpu_cu_info *cu_info) in gfx_v9_4_3_get_cu_info() argument 4929 if (!adev || !cu_info) in gfx_v9_4_3_get_cu_info() 4958 cu_info->bitmap[xcc_id][i][j] = bitmap; in gfx_v9_4_3_get_cu_info() 4971 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v9_4_3_get_cu_info() 4988 cu_info->number = active_cu_number; in gfx_v9_4_3_get_cu_info() 4989 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v9_4_3_get_cu_info() 4990 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v9_4_3_get_cu_info()
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| A D | amdgpu_amdkfd_gfx_v9.c | 1078 *max_waves_per_cu = adev->gfx.cu_info.simd_per_cu * in kgd_gfx_v9_get_cu_occupancy() 1079 adev->gfx.cu_info.max_waves_per_simd; in kgd_gfx_v9_get_cu_occupancy()
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| A D | amdgpu_gfx.h | 421 struct amdgpu_cu_info cu_info; member
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| A D | gfx_v12_0.c | 227 struct amdgpu_cu_info *cu_info); 1674 gfx_v12_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v12_0_constants_init() 5512 struct amdgpu_cu_info *cu_info) in gfx_v12_0_get_cu_info() argument 5518 if (!adev || !cu_info) in gfx_v12_0_get_cu_info() 5552 cu_info->bitmap[0][i % 4][j + (i / 4) * 2] = bitmap; in gfx_v12_0_get_cu_info() 5566 cu_info->number = active_cu_number; in gfx_v12_0_get_cu_info() 5567 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v12_0_get_cu_info()
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| A D | amdgpu_device.c | 2428 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); in amdgpu_device_parse_gpu_info_fw() 2429 adev->gfx.cu_info.max_waves_per_simd = in amdgpu_device_parse_gpu_info_fw() 2431 adev->gfx.cu_info.max_scratch_slots_per_cu = in amdgpu_device_parse_gpu_info_fw() 2433 adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); in amdgpu_device_parse_gpu_info_fw() 4365 adev->gfx.cu_info.number); in amdgpu_device_init()
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| A D | gfx_v11_0.c | 275 struct amdgpu_cu_info *cu_info); 1949 gfx_v11_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v11_0_constants_init() 7058 struct amdgpu_cu_info *cu_info) in gfx_v11_0_get_cu_info() argument 7064 if (!adev || !cu_info) in gfx_v11_0_get_cu_info() 7098 cu_info->bitmap[0][i % 4][j + (i / 4) * 2] = bitmap; in gfx_v11_0_get_cu_info() 7112 cu_info->number = active_cu_number; in gfx_v11_0_get_cu_info() 7113 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v11_0_get_cu_info()
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| A D | gfx_v10_0.c | 3654 struct amdgpu_cu_info *cu_info); 5194 gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v10_0_constants_init() 10003 struct amdgpu_cu_info *cu_info) in gfx_v10_0_get_cu_info() argument 10009 if (!adev || !cu_info) in gfx_v10_0_get_cu_info() 10036 cu_info->bitmap[0][i][j] = bitmap; in gfx_v10_0_get_cu_info() 10049 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v10_0_get_cu_info() 10055 cu_info->number = active_cu_number; in gfx_v10_0_get_cu_info() 10056 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v10_0_get_cu_info() 10057 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v10_0_get_cu_info()
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| /linux/drivers/net/ethernet/marvell/prestera/ |
| A D | prestera_main.c | 1106 struct netdev_notifier_changeupper_info *cu_info; in prestera_netdev_port_event() local 1112 cu_info = container_of(info, in prestera_netdev_port_event() 1118 upper = cu_info->upper_dev; in prestera_netdev_port_event() 1125 if (!cu_info->linking) in prestera_netdev_port_event() 1134 !prestera_lag_master_check(upper, cu_info->upper_info, extack)) in prestera_netdev_port_event() 1150 upper = cu_info->upper_dev; in prestera_netdev_port_event() 1152 if (cu_info->linking) in prestera_netdev_port_event() 1158 if (cu_info->linking) in prestera_netdev_port_event()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | smu7_clockpowergating.c | 431 adev->gfx.cu_info.number, in smu7_powergate_gfx()
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| A D | vega12_hwmgr.c | 440 data->total_active_cus = adev->gfx.cu_info.number; in vega12_hwmgr_backend_init()
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| A D | vega20_hwmgr.c | 483 data->total_active_cus = adev->gfx.cu_info.number; in vega20_hwmgr_backend_init()
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| /linux/drivers/net/ethernet/mellanox/mlxsw/ |
| A D | spectrum.c | 5327 struct netdev_notifier_changeupper_info *cu_info; in mlxsw_sp_netdevice_vxlan_event() local 5336 cu_info = container_of(info, in mlxsw_sp_netdevice_vxlan_event() 5339 upper_dev = cu_info->upper_dev; in mlxsw_sp_netdevice_vxlan_event() 5346 if (cu_info->linking) { in mlxsw_sp_netdevice_vxlan_event()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | vangogh_ppt.c | 2235 uint32_t req_active_wgps = adev->gfx.cu_info.number/2; in vangogh_post_smu_init() 2253 if (total_cu == adev->gfx.cu_info.number) in vangogh_post_smu_init()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | vegam_smumgr.c | 1911 adev->gfx.cu_info.number, in vegam_enable_reconfig_cus()
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