| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dm_helpers.h | 49 struct dc_context *ctx,
58 struct dc_context *ctx,
72 struct dc_context *ctx,
79 struct dc_context *ctx,
88 struct dc_context *ctx,
95 struct dc_context *ctx,
102 struct dc_context *ctx,
108 struct dc_context *ctx,
115 struct dc_context *ctx,
193 struct dc_context *ctx,
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| A D | dm_services.h | 46 struct dc_context *ctx,
72 const struct dc_context *ctx, in dm_read_index_reg()
80 const struct dc_context *ctx, in dm_write_index_reg()
191 const struct dc_context *ctx,
196 const struct dc_context *ctx,
201 const struct dc_context *ctx,
206 const struct dc_context *ctx,
224 const struct dc_context *ctx,
228 const struct dc_context *ctx,
232 const struct dc_context *ctx,
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| A D | dc_helper.c | 44 const struct dc_context *ctx) in submit_dmub_read_modify_write()
63 const struct dc_context *ctx) in submit_dmub_burst_write()
79 const struct dc_context *ctx) in submit_dmub_reg_wait()
131 const struct dc_context *ctx) in dmub_flush_buffer_execute()
138 const struct dc_context *ctx) in dmub_flush_burst_write_buffer_execute()
221 uint32_t generic_reg_update_ex(const struct dc_context *ctx, in generic_reg_update_ex()
249 uint32_t generic_reg_set_ex(const struct dc_context *ctx, in generic_reg_set_ex()
427 void generic_reg_wait(const struct dc_context *ctx, in generic_reg_wait()
479 void generic_write_indirect_reg(const struct dc_context *ctx, in generic_write_indirect_reg()
626 void reg_sequence_start_gather(const struct dc_context *ctx) in reg_sequence_start_gather()
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| A D | dc_dmub_srv.h | 52 struct dc_context *ctx;
158 bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd,
181 bool dc_wake_and_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned int count,
193 bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_command command_code,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.h | 53 struct dc_context *ctx,
71 struct dc_context *ctx);
74 struct dc_context *ctx);
83 struct dc_context *ctx,
87 struct dc_context *ctx, uint32_t inst);
90 struct dc_context *ctx, uint32_t inst);
93 struct dc_context *ctx, uint32_t inst);
96 struct dc_context *ctx,
102 struct dc_context *ctx, uint32_t inst);
106 struct dc_context *ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | gpio.h | 55 struct dc_context *ctx,
59 struct dc_context *ctx,
63 struct dc_context *ctx,
67 struct dc_context *ctx,
71 struct dc_context *ctx,
75 struct dc_context *ctx,
79 struct dc_context *ctx,
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| A D | vpg.h | 28 struct dc_context;
49 struct dc_context *ctx;
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_pp_smu.c | 37 const struct dc_context *ctx, in dm_pp_apply_display_requirements()
293 const struct dc_context *ctx, in dm_pp_get_clock_levels_by_type()
360 const struct dc_context *ctx, in dm_pp_get_clock_levels_by_type_with_latency()
380 const struct dc_context *ctx, in dm_pp_get_clock_levels_by_type_with_voltage()
400 const struct dc_context *ctx, in dm_pp_notify_wm_clock_changes()
419 const struct dc_context *ctx, in dm_pp_apply_power_level_change_request()
427 const struct dc_context *ctx, in dm_pp_apply_clock_for_voltage_request()
448 const struct dc_context *ctx, in dm_pp_get_static_clocks()
467 const struct dc_context *ctx = pp->dm; in pp_rv_set_wm_ranges()
515 const struct dc_context *ctx = pp->dm; in pp_rv_set_pme_wa_enable()
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| A D | amdgpu_dm_helpers.c | 217 struct dc_context *ctx, in dm_helpers_dp_update_branch_info()
257 struct dc_context *ctx, in dm_helpers_dp_mst_write_payload_allocation_table()
309 struct dc_context *ctx, in dm_helpers_dp_mst_poll_pending_down_reply()
317 struct dc_context *ctx, in dm_helpers_dp_mst_clear_payload_allocation_table()
326 struct dc_context *ctx, in dm_helpers_dp_mst_poll_for_allocation_change_trigger()
352 struct dc_context *ctx, in dm_helpers_dp_mst_send_payload_allocation()
386 struct dc_context *ctx, in dm_helpers_dp_mst_update_mst_mgr_for_deallocation()
502 struct dc_context *ctx, in dm_helpers_dp_mst_start_top_mgr()
536 struct dc_context *ctx, in dm_helpers_dp_mst_stop_top_mgr()
1015 struct dc_context *ctx, in dm_helpers_init_panel_settings()
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| A D | amdgpu_dm_services.c | 39 dm_get_elapse_time_in_ns(struct dc_context *ctx, in dm_get_elapse_time_in_ns()
46 void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc_context *ctx) in dm_perf_trace_timestamp()
55 void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx) in dm_trace_smu_msg()
59 void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx) in dm_trace_smu_delay()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_cm_common.h | 93 struct dc_context *ctx,
98 struct dc_context *ctx,
109 struct dc_context *ctx,
117 void cm_helper_read_color_matrices(struct dc_context *ctx,
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | vector.h | 34 struct dc_context *ctx;
39 struct dc_context *ctx,
44 struct dc_context *ctx,
51 struct dc_context *ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_abm_lcd.c | 56 static void dmub_abm_enable_fractional_pwm(struct dc_context *dc) in dmub_abm_enable_fractional_pwm()
144 struct dc_context *dc = abm->ctx; in dmub_abm_set_level()
165 struct dc_context *dc = abm->ctx; in dmub_abm_init_config()
192 struct dc_context *dc = abm->ctx; in dmub_abm_set_pause()
220 struct dc_context *dc, in dmub_abm_save_restore()
260 struct dc_context *dc = abm->ctx; in dmub_abm_set_pipe()
284 struct dc_context *dc = abm->ctx; in dmub_abm_set_backlight_level()
304 struct dc_context *dc = abm->ctx; in dmub_abm_set_event()
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| A D | dce_i2c_sw.c | 34 struct dc_context *ctx) in dce_i2c_sw_construct()
75 struct dc_context *ctx, in wait_for_scl_high_sw()
96 struct dc_context *ctx, in write_byte_sw()
153 struct dc_context *ctx, in read_byte_sw()
213 struct dc_context *ctx, in stop_sync_sw()
250 struct dc_context *ctx, in i2c_write_sw()
272 struct dc_context *ctx, in i2c_read_sw()
297 struct dc_context *ctx, in start_sync_sw()
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| A D | dce_clock_source.h | 258 struct dc_context *ctx,
267 struct dc_context *ctx,
276 struct dc_context *ctx,
285 struct dc_context *ctx,
294 struct dc_context *ctx,
303 struct dc_context *ctx,
312 struct dc_context *ctx,
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| A D | dmub_replay.c | 49 struct dc_context *dc = dmub->ctx; in dmub_replay_enable()
99 struct dc_context *dc = dmub->ctx; in dmub_replay_set_power_opt()
120 struct dc_context *dc = dmub->ctx; in dmub_replay_copy_settings()
205 struct dc_context *dc = dmub->ctx; in dmub_replay_set_coasting_vtotal()
275 struct dc_context *dc = dmub->ctx; in dmub_replay_set_power_opt_and_coasting_vtotal()
299 struct dc_context *ctx = NULL; in dmub_replay_send_cmd()
406 static void dmub_replay_construct(struct dmub_replay *replay, struct dc_context *ctx) in dmub_replay_construct()
415 struct dmub_replay *dmub_replay_create(struct dc_context *ctx) in dmub_replay_create()
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| A D | dmub_psr.c | 143 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
182 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
234 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
258 struct dc_context *dc = dmub->ctx; in dmub_psr_set_sink_vtotal_in_psr_active()
276 struct dc_context *dc = dmub->ctx; in dmub_psr_set_power_opt()
298 struct dc_context *dc = dmub->ctx; in dmub_psr_copy_settings()
435 struct dc_context *dc = dmub->ctx; in dmub_psr_force_static()
477 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx) in dmub_psr_construct()
486 struct dmub_psr *dmub_psr_create(struct dc_context *ctx) in dmub_psr_create()
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| A D | dmub_abm.c | 40 struct dc_context *dc = abm->ctx; in abm_feature_support()
142 struct dc_context *dc = abm->ctx; in dmub_abm_save_restore_ex()
200 struct dc_context *ctx, in dmub_abm_construct()
217 struct dc_context *ctx, in dmub_abm_create()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | hw_factory.h | 41 struct dc_context *ctx,
46 struct dc_context *ctx,
51 struct dc_context *ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | resource.h | 71 struct dc_context *ctx, struct resource_straps *straps);
74 struct dc_context *ctx, unsigned int inst);
77 enum engine_id eng_id, struct dc_context *ctx);
80 enum engine_id eng_id, struct dc_context *ctx);
83 struct dc_context *ctx);
85 struct dc_context *ctx);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| A D | dce120_clk_mgr.h | 29 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr);
30 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr);
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| /linux/drivers/gpu/drm/amd/display/dc/virtual/ |
| A D | virtual_stream_encoder.h | 32 struct dc_context *ctx, struct dc_bios *bp);
36 struct dc_context *ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| A D | dce100_resource.c | 444 struct dc_context *ctx, in read_dce_straps()
462 struct dc_context *ctx, in dce100_timing_generator_create()
478 struct dc_context *ctx) in dce100_stream_encoder_create()
507 struct dc_context *ctx) in dce100_hwseq_create()
559 struct dc_context *ctx, in dce100_mem_input_create()
582 struct dc_context *ctx, in dce100_transform_create()
619 struct dc_context *ctx, in dce100_link_encoder_create()
659 struct dc_context *ctx, in dce100_opp_create()
674 struct dc_context *ctx, in dce100_aux_engine_create()
712 struct dc_context *ctx, in dce100_i2c_hw_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| A D | dce120_resource.c | 426 struct dc_context *ctx, in dce120_opp_create()
440 struct dc_context *ctx, in dce120_aux_engine_create()
478 struct dc_context *ctx, in dce120_i2c_hw_create()
533 struct dc_context *ctx, in dce120_clock_source_create()
665 struct dc_context *ctx, in read_dce_straps()
702 struct dc_context *ctx, in dce120_link_encoder_create()
759 struct dc_context *ctx) in dce120_stream_encoder_create()
803 struct dc_context *ctx) in dce120_hwseq_create()
817 struct dc_context *ctx) in dce121_hwseq_create()
864 struct dc_context *ctx, in dce120_mem_input_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| A D | dcn302_resource.c | 253 static struct hubbub *dcn302_hubbub_create(struct dc_context *ctx) in dcn302_hubbub_create()
297 static struct vpg *dcn302_vpg_create(struct dc_context *ctx, uint32_t inst) in dcn302_vpg_create()
329 static struct afmt *dcn302_afmt_create(struct dc_context *ctx, uint32_t inst) in dcn302_afmt_create()
367 static struct audio *dcn302_create_audio(struct dc_context *ctx, unsigned int inst) in dcn302_create_audio()
472 static struct dce_hwseq *dcn302_hwseq_create(struct dc_context *ctx) in dcn302_hwseq_create()
504 static struct hubp *dcn302_hubp_create(struct dc_context *ctx, uint32_t inst) in dcn302_hubp_create()
538 static struct dpp *dcn302_dpp_create(struct dc_context *ctx, uint32_t inst) in dcn302_dpp_create()
708 static bool dcn302_dwbc_create(struct dc_context *ctx, struct resource_pool *pool) in dcn302_dwbc_create()
891 struct dc_context *ctx, in dcn302_link_encoder_create()
931 static void read_dce_straps(struct dc_context *ctx, struct resource_straps *straps) in read_dce_straps()
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