Searched refs:ddrphycfg_parents (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 52 static const char * const ddrphycfg_parents[] = { variable
390 MUX_GATE_FLAGS(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
432 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", ddrphycfg_parents,
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| A D | clk-mt6795-topckgen.c | 101 static const char * const ddrphycfg_parents[] = { variable
456 TOP_MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
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| A D | clk-mt8173-topckgen.c | 49 static const char * const ddrphycfg_parents[] = { variable
535 ddrphycfg_parents, 0x0040, 16, 1, 23,
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| A D | clk-mt8135.c | 280 static const char * const ddrphycfg_parents[] = { variable
383 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
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| A D | clk-mt7629.c | 81 static const char * const ddrphycfg_parents[] = { variable
466 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
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| A D | clk-mt8167.c | 328 static const char * const ddrphycfg_parents[] = { variable
559 MUX(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
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| A D | clk-mt6797.c | 103 static const char * const ddrphycfg_parents[] = { variable
329 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
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| A D | clk-mt2701.c | 159 static const char * const ddrphycfg_parents[] = { variable
492 ddrphycfg_parents, 0x0040, 16, 1, 23, CLK_IS_CRITICAL),
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