Searched refs:def1 (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | mmhub_v2_3.c | 495 uint32_t def, data, def1, data1; in mmhub_v2_3_update_medium_grain_clock_gating() local
498 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_3_update_medium_grain_clock_gating()
521 if (def1 != data1) in mmhub_v2_3_update_medium_grain_clock_gating()
529 uint32_t def, data, def1, data1, def2, data2; in mmhub_v2_3_update_medium_grain_light_sleep() local
532 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL); in mmhub_v2_3_update_medium_grain_light_sleep()
563 if (def1 != data1) in mmhub_v2_3_update_medium_grain_light_sleep()
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| A D | mmhub_v2_0.c | 566 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local
575 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_update_medium_grain_clock_gating()
579 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating()
608 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
614 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
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| A D | mmhub_v1_0.c | 452 uint32_t def, data, def1, data1, def2 = 0, data2 = 0; in mmhub_v1_0_update_medium_grain_clock_gating() local
457 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_update_medium_grain_clock_gating()
460 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV); in mmhub_v1_0_update_medium_grain_clock_gating()
501 if (def1 != data1) { in mmhub_v1_0_update_medium_grain_clock_gating()
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| A D | mmhub_v3_0.c | 547 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v3_0_update_medium_grain_clock_gating()
552 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v3_0_update_medium_grain_clock_gating()
595 if (def1 != data1) in mmhub_v3_0_update_medium_grain_clock_gating()
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| A D | mmhub_v4_1_0.c | 551 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v4_1_0_update_medium_grain_clock_gating() local
555 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v4_1_0_update_medium_grain_clock_gating()
582 if (def1 != data1) in mmhub_v4_1_0_update_medium_grain_clock_gating()
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| A D | mmhub_v1_7.c | 459 uint32_t def, data, def1, data1, def2 = 0, data2 = 0; in mmhub_v1_7_update_medium_grain_clock_gating() local
463 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v1_7_update_medium_grain_clock_gating()
503 if (def1 != data1) in mmhub_v1_7_update_medium_grain_clock_gating()
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| A D | mmhub_v9_4.c | 562 uint32_t def, data, def1, data1; in mmhub_v9_4_update_medium_grain_clock_gating() local
581 def1 = data1 = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_update_medium_grain_clock_gating()
604 if (def1 != data1) in mmhub_v9_4_update_medium_grain_clock_gating()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | iceland_smumgr.c | 1857 const uint16_t *def1, *def2; in iceland_populate_bapm_parameters_in_dpm_table() local
1890 def1 = defaults->bapmti_r; in iceland_populate_bapm_parameters_in_dpm_table()
1896 dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); in iceland_populate_bapm_parameters_in_dpm_table()
1898 def1++; in iceland_populate_bapm_parameters_in_dpm_table()
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| A D | ci_smumgr.c | 723 const uint16_t *def1, *def2; in ci_populate_bapm_parameters_in_dpm_table() local
747 def1 = defaults->bapmti_r; in ci_populate_bapm_parameters_in_dpm_table()
753 dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*def1); in ci_populate_bapm_parameters_in_dpm_table()
755 def1++; in ci_populate_bapm_parameters_in_dpm_table()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | ci_dpm.c | 410 const u16 *def1; in ci_populate_bapm_parameters_in_dpm_table() local
432 def1 = pt_defaults->bapmti_r; in ci_populate_bapm_parameters_in_dpm_table()
438 dpm_table->BAPMTI_R[i][j][k] = cpu_to_be16(*def1); in ci_populate_bapm_parameters_in_dpm_table()
440 def1++; in ci_populate_bapm_parameters_in_dpm_table()
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