| /linux/drivers/gpu/drm/radeon/ |
| A D | rs690.c | 128 tmp.full = dfixed_const(4); in rs690_pm_info() 133 tmp.full = dfixed_const(5); in rs690_pm_info() 302 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute() 332 b.full = dfixed_const(2); in rs690_crtc_bandwidth_compute() 336 c.full = dfixed_const(2); in rs690_crtc_bandwidth_compute() 342 a.full = dfixed_const(1); in rs690_crtc_bandwidth_compute() 386 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute() 397 a.full = dfixed_const(10); in rs690_crtc_bandwidth_compute() 409 a.full = dfixed_const(3); in rs690_crtc_bandwidth_compute() 413 a.full = dfixed_const(2); in rs690_crtc_bandwidth_compute() [all …]
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| A D | rv515.c | 949 a.full = dfixed_const(100); in rv515_crtc_bandwidth_compute() 959 c.full = dfixed_const(256); in rv515_crtc_bandwidth_compute() 976 b.full = dfixed_const(1000); in rv515_crtc_bandwidth_compute() 980 b.full = dfixed_const(2); in rv515_crtc_bandwidth_compute() 984 c.full = dfixed_const(2); in rv515_crtc_bandwidth_compute() 990 a.full = dfixed_const(1); in rv515_crtc_bandwidth_compute() 1030 a.full = dfixed_const(3); in rv515_crtc_bandwidth_compute() 1061 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute() 1072 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute() 1107 a.full = dfixed_const(16); in rv515_compute_mode_priority() [all …]
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| A D | evergreen.c | 1961 a.full = dfixed_const(10); in evergreen_dram_bandwidth() 1981 a.full = dfixed_const(10); in evergreen_dram_bandwidth_for_display() 2000 a.full = dfixed_const(10); in evergreen_data_return_bandwidth() 2003 a.full = dfixed_const(32); in evergreen_data_return_bandwidth() 2020 a.full = dfixed_const(10); in evergreen_dmif_request_bandwidth() 2023 a.full = dfixed_const(32); in evergreen_dmif_request_bandwidth() 2081 a.full = dfixed_const(2); in evergreen_latency_watermark() 2082 b.full = dfixed_const(1); in evergreen_latency_watermark() 2137 a.full = dfixed_const(1); in evergreen_check_latency_hiding() 2265 a.full = dfixed_const(16); in evergreen_program_watermarks() [all …]
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| A D | si.c | 2056 a.full = dfixed_const(1000); in dce6_dram_bandwidth() 2060 a.full = dfixed_const(10); in dce6_dram_bandwidth() 2080 a.full = dfixed_const(10); in dce6_dram_bandwidth_for_display() 2099 a.full = dfixed_const(10); in dce6_data_return_bandwidth() 2102 a.full = dfixed_const(32); in dce6_data_return_bandwidth() 2134 a.full = dfixed_const(10); in dce6_dmif_request_bandwidth() 2198 a.full = dfixed_const(2); in dce6_latency_watermark() 2199 b.full = dfixed_const(1); in dce6_latency_watermark() 2256 a.full = dfixed_const(1); in dce6_check_latency_hiding() 2389 a.full = dfixed_const(16); in dce6_program_watermarks() [all …]
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| A D | r100.c | 3283 temp_ff.full = dfixed_const(temp); in r100_bandwidth_update() 3290 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update() 3297 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update() 3347 trp_ff.full = dfixed_const(mem_trp); in r100_bandwidth_update() 3430 k1.full = dfixed_const(40); in r100_bandwidth_update() 3433 k1.full = dfixed_const(20); in r100_bandwidth_update() 3437 k1.full = dfixed_const(40); in r100_bandwidth_update() 3441 temp_ff.full = dfixed_const(2); in r100_bandwidth_update() 3443 temp_ff.full = dfixed_const(c); in r100_bandwidth_update() 3445 temp_ff.full = dfixed_const(4); in r100_bandwidth_update() [all …]
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| A D | cik.c | 8930 a.full = dfixed_const(1000); in dce8_dram_bandwidth() 8934 a.full = dfixed_const(10); in dce8_dram_bandwidth() 8959 a.full = dfixed_const(1000); in dce8_dram_bandwidth_for_display() 8963 a.full = dfixed_const(10); in dce8_dram_bandwidth_for_display() 8991 a.full = dfixed_const(10); in dce8_data_return_bandwidth() 8994 a.full = dfixed_const(32); in dce8_data_return_bandwidth() 9020 a.full = dfixed_const(32); in dce8_dmif_request_bandwidth() 9023 a.full = dfixed_const(10); in dce8_dmif_request_bandwidth() 9111 a.full = dfixed_const(2); in dce8_latency_watermark() 9112 b.full = dfixed_const(1); in dce8_latency_watermark() [all …]
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| A D | radeon_display.c | 1757 a.full = dfixed_const(src_v); in radeon_crtc_scaling_mode_fixup() 1758 b.full = dfixed_const(dst_v); in radeon_crtc_scaling_mode_fixup() 1760 a.full = dfixed_const(src_h); in radeon_crtc_scaling_mode_fixup() 1761 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup() 1764 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup() 1765 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
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| A D | radeon_device.c | 731 a.full = dfixed_const(100); in radeon_update_bandwidth_info() 732 rdev->pm.sclk.full = dfixed_const(sclk); in radeon_update_bandwidth_info() 734 rdev->pm.mclk.full = dfixed_const(mclk); in radeon_update_bandwidth_info() 738 a.full = dfixed_const(16); in radeon_update_bandwidth_info()
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| /linux/include/drm/ |
| A D | drm_fixed.h | 37 #define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ macro 42 #define dfixed_init(A) { .full = dfixed_const((A)) } 51 return dfixed_const(non_frac); in dfixed_floor() 58 if (A.full > dfixed_const(non_frac)) in dfixed_ceil() 59 return dfixed_const(non_frac + 1); in dfixed_ceil() 61 return dfixed_const(non_frac); in dfixed_ceil()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v6_0.c | 549 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth() 578 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth_for_display() 606 a.full = dfixed_const(10); in dce_v6_0_data_return_bandwidth() 609 a.full = dfixed_const(32); in dce_v6_0_data_return_bandwidth() 635 a.full = dfixed_const(32); in dce_v6_0_dmif_request_bandwidth() 638 a.full = dfixed_const(10); in dce_v6_0_dmif_request_bandwidth() 726 a.full = dfixed_const(2); in dce_v6_0_latency_watermark() 727 b.full = dfixed_const(1); in dce_v6_0_latency_watermark() 815 a.full = dfixed_const(1); in dce_v6_0_check_latency_hiding() 956 a.full = dfixed_const(16); in dce_v6_0_program_watermarks() [all …]
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| A D | dce_v8_0.c | 680 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth() 684 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth() 709 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth_for_display() 713 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth_for_display() 741 a.full = dfixed_const(10); in dce_v8_0_data_return_bandwidth() 744 a.full = dfixed_const(32); in dce_v8_0_data_return_bandwidth() 770 a.full = dfixed_const(32); in dce_v8_0_dmif_request_bandwidth() 773 a.full = dfixed_const(10); in dce_v8_0_dmif_request_bandwidth() 861 a.full = dfixed_const(2); in dce_v8_0_latency_watermark() 862 b.full = dfixed_const(1); in dce_v8_0_latency_watermark() [all …]
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| A D | dce_v10_0.c | 727 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth() 731 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth() 756 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth_for_display() 760 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth_for_display() 788 a.full = dfixed_const(10); in dce_v10_0_data_return_bandwidth() 791 a.full = dfixed_const(32); in dce_v10_0_data_return_bandwidth() 817 a.full = dfixed_const(32); in dce_v10_0_dmif_request_bandwidth() 820 a.full = dfixed_const(10); in dce_v10_0_dmif_request_bandwidth() 908 a.full = dfixed_const(2); in dce_v10_0_latency_watermark() 909 b.full = dfixed_const(1); in dce_v10_0_latency_watermark() [all …]
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| A D | dce_v11_0.c | 759 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth() 763 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth() 788 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth_for_display() 792 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth_for_display() 820 a.full = dfixed_const(10); in dce_v11_0_data_return_bandwidth() 823 a.full = dfixed_const(32); in dce_v11_0_data_return_bandwidth() 849 a.full = dfixed_const(32); in dce_v11_0_dmif_request_bandwidth() 852 a.full = dfixed_const(10); in dce_v11_0_dmif_request_bandwidth() 940 a.full = dfixed_const(2); in dce_v11_0_latency_watermark() 941 b.full = dfixed_const(1); in dce_v11_0_latency_watermark() [all …]
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| A D | amdgpu_display.c | 1498 a.full = dfixed_const(src_v); in amdgpu_display_crtc_scaling_mode_fixup() 1499 b.full = dfixed_const(dst_v); in amdgpu_display_crtc_scaling_mode_fixup() 1501 a.full = dfixed_const(src_h); in amdgpu_display_crtc_scaling_mode_fixup() 1502 b.full = dfixed_const(dst_h); in amdgpu_display_crtc_scaling_mode_fixup() 1505 amdgpu_crtc->vsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup() 1506 amdgpu_crtc->hsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()
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| /linux/drivers/gpu/drm/tegra/ |
| A D | dc.c | 152 outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1)); in compute_dda_inc() 153 inf.full -= dfixed_const(1); in compute_dda_inc() 156 dda_inc = min_t(u32, dda_inc, dfixed_const(max)); in compute_dda_inc()
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_dp_mst.c | 259 pbn.full = dfixed_const(intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock, in intel_dp_mst_find_vcpi_slots_for_bpp()
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| /linux/drivers/gpu/drm/display/ |
| A D | drm_dp_mst_topology.c | 4399 req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full); in drm_dp_atomic_find_time_slots() 5395 mst_state->pbn_div.full = dfixed_const(0); in drm_dp_mst_atomic_check_payload_alloc_limits()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.c | 7607 mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link)); in dm_encoder_helper_atomic_check()
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