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Searched refs:dpcd_caps (Results 1 – 25 of 36) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_capability.c1021 link->dpcd_caps.branch_dev_id = in read_dp_device_vendor_id()
1078 memset(&link->dpcd_caps.dongle_caps, 0, sizeof(link->dpcd_caps.dongle_caps)); in get_active_converter_info()
1084 link->dpcd_caps.dongle_type); in get_active_converter_info()
1132 link->dpcd_caps.dongle_caps.dongle_type = link->dpcd_caps.dongle_type; in get_active_converter_info()
1283 link->dpcd_caps.dpcd_rev.raw = in dp_overwrite_extended_receiver_cap()
1685 link->dpcd_caps.dpcd_rev.raw = in retrieve_link_cap()
1791 link->dpcd_caps.sink_dev_id = in retrieve_link_cap()
1837 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap)); in retrieve_link_cap()
1890 memset(&link->dpcd_caps.dsc_caps, '\0', sizeof(link->dpcd_caps.dsc_caps)); in retrieve_link_cap()
1891 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap)); in retrieve_link_cap()
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A Dlink_ddc.c218 link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()
219 (link->dpcd_caps.branch_fw_revision[0] < 0x01 || in defer_delay_converter_wa()
220 (link->dpcd_caps.branch_fw_revision[0] == 0x01 && in defer_delay_converter_wa()
221 link->dpcd_caps.branch_fw_revision[1] < 0x40)) && in defer_delay_converter_wa()
222 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
224 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
230 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
232 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
236 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
238 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
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A Dlink_dp_dpia.c68 link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw = in dpcd_get_tunneling_device_data()
70 link->dpcd_caps.usb4_dp_tun_info.dpia_info.raw = in dpcd_get_tunneling_device_data()
72 link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id = in dpcd_get_tunneling_device_data()
76 link->dpcd_caps.usb4_dp_tun_info.usb4_topology_id[i] = dpcd_topology_data[i]; in dpcd_get_tunneling_device_data()
A Dlink_edp_panel_control.c97 link->dpcd_caps.panel_mode_edp, in dp_set_panel_mode()
109 switch (link->dpcd_caps.branch_dev_id) { in dp_get_panel_mode()
118 link->dpcd_caps.branch_dev_name, in dp_get_panel_mode()
121 link->dpcd_caps. in dp_get_panel_mode()
132 if (strncmp(link->dpcd_caps.branch_dev_name, in dp_get_panel_mode()
135 link->dpcd_caps. in dp_get_panel_mode()
145 if (link->dpcd_caps.panel_mode_edp && in dp_get_panel_mode()
175 if (!link->dpcd_caps.panel_luminance_control) { in edp_set_backlight_level_nits()
266 if (!link->dpcd_caps.panel_luminance_control) { in read_default_bl_aux()
314 if (max_ilr_rate < link->dpcd_caps.edp_supported_link_rates[i]) in get_max_edp_link_rate()
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A Dlink_dp_training.c542 link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]); in dp_get_eq_aux_rd_interval()
806 struct dpcd_caps *rx_caps = &link->dpcd_caps; in decide_eq_training_pattern()
933 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
947 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
957 link->dpcd_caps.lttpr_caps.aux_rd_interval[--repeater_cnt] = 0; in configure_lttpr_mode_non_transparent()
965 (uint8_t *)&link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1], in configure_lttpr_mode_non_transparent()
966 sizeof(link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1])); in configure_lttpr_mode_non_transparent()
967 link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1] &= 0x7F; in configure_lttpr_mode_non_transparent()
1105 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dpcd_set_link_settings()
1114 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 && in dpcd_set_link_settings()
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A Dlink_dp_training_dpia.c302 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_cr_non_transparent()
605 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_eq_non_transparent()
866 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_end()
927 link->dpcd_caps.lttpr_caps.aux_rd_interval[hop - 1]); in dpia_get_eq_aux_rd_interval()
978 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_set_tps_notification()
1005 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_perform_link_training()
A Dlink_dp_training_fixed_vs_pe_retimer.c147 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in perform_fixed_vs_pe_nontransparent_training_sequence()
196 link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_fixed_vs_pe_training_sequence()
262 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dp_perform_fixed_vs_pe_training_sequence()
273 if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED) { in dp_perform_fixed_vs_pe_training_sequence()
A Dlink_dp_training_8b_10b.c46 link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_cr_training_aux_rd_interval()
72 link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_eq_training_aux_rd_interval()
379 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_8b_10b_link_training()
A Dlink_dp_phy.c92 return (dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == in is_immediate_downstream()
A Dlink_dp_training_128b_132b.c248 link->dpcd_caps.lttpr_caps.phy_repeater_cnt) + 1) * 20000; in decide_128b_132b_training_settings()
/linux/drivers/gpu/drm/amd/display/dc/link/
A Dlink_validation.c58 const struct dpcd_caps *dpcd_caps) in dp_active_dongle_validate_timing() argument
60 const struct dc_dongle_caps *dongle_caps = &dpcd_caps->dongle_caps; in dp_active_dongle_validate_timing()
62 switch (dpcd_caps->dongle_type) { in dp_active_dongle_validate_timing()
74 if (dpcd_caps->dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER && in dp_active_dongle_validate_timing()
140 if (dpcd_caps->channel_coding_cap.bits.DP_128b_132b_SUPPORTED == 0 && in dp_active_dongle_validate_timing()
141 dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 && in dp_active_dongle_validate_timing()
269 !link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED && in dp_validate_mode_timing()
290 …bool is_max_uncompressed_pixel_rate_exceeded = link->dpcd_caps.max_uncompressed_pixel_rate_cap.bit… in dp_validate_mode_timing()
291 …timing->pix_clk_100hz > link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.max_uncompressed_pixe… in dp_validate_mode_timing()
322 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in link_validate_mode_timing() local
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A Dlink_detection.c610 link->dpcd_caps.dpcd_rev.raw = 0; in detect_dp()
824 if (link->dpcd_caps.is_mst_capable || in should_verify_link_capability_destructively()
864 struct dpcd_caps prev_dpcd_caps; in detect_link_and_local_sink()
896 memcpy(&prev_dpcd_caps, &link->dpcd_caps, sizeof(struct dpcd_caps)); in detect_link_and_local_sink()
943 sizeof(link->dpcd_caps.branch_dev_name)) == 0) { in detect_link_and_local_sink()
946 if (!link->dpcd_caps.set_power_state_capable_edp) in detect_link_and_local_sink()
985 (link->dpcd_caps.dongle_type != in detect_link_and_local_sink()
1021 if (link->dpcd_caps.sink_count.bits.SINK_COUNT) in detect_link_and_local_sink()
1023 link->dpcd_caps.sink_count.bits.SINK_COUNT; in detect_link_and_local_sink()
1079 link->dpcd_caps.dongle_type == in detect_link_and_local_sink()
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A Dlink_factory.c467 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_phy()
758 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_dpia()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_replay.c44 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in amdgpu_dm_link_supports_replay() local
45 struct adaptive_sync_caps *as_caps = &link->dpcd_caps.adaptive_sync_caps; in amdgpu_dm_link_supports_replay()
54 if (dpcd_caps->edp_rev < EDP_REVISION_13) in amdgpu_dm_link_supports_replay()
57 if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP) in amdgpu_dm_link_supports_replay()
65 if (dpcd_caps->pr_info.pixel_deviation_per_line == 0 || in amdgpu_dm_link_supports_replay()
66 dpcd_caps->pr_info.max_deviation_line == 0) in amdgpu_dm_link_supports_replay()
A Damdgpu_dm_psr.c46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu()
47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu()
50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu()
51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu()
77 if (link->dpcd_caps.psr_info.psr_version == 0) { in amdgpu_dm_set_psr_caps()
93 link->dpcd_caps.psr_info.psr_version, in amdgpu_dm_set_psr_caps()
94 link->dpcd_caps.psr_info.psr_dpcd_caps.raw, in amdgpu_dm_set_psr_caps()
95 link->dpcd_caps.psr_info.psr2_su_y_granularity_cap); in amdgpu_dm_set_psr_caps()
A Damdgpu_dm_helpers.c775 memcmp(stream->link->dpcd_caps.branch_dev_name, in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
863 if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) { in dm_helpers_dp_write_dsc_enable()
868 } else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) { in dm_helpers_dp_write_dsc_enable()
1290 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in dm_get_adaptive_sync_support_type() local
1293 switch (dpcd_caps->dongle_type) { in dm_get_adaptive_sync_support_type()
1295 if (dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true && in dm_get_adaptive_sync_support_type()
1296 dpcd_caps->allow_invalid_MSA_timing_param == true && in dm_get_adaptive_sync_support_type()
1297 dm_is_freesync_pcon_whitelist(dpcd_caps->branch_dev_id)) in dm_get_adaptive_sync_support_type()
A Damdgpu_dm_mst_types.c208 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in needs_dsc_aux_workaround()
209 (link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) && in needs_dsc_aux_workaround()
210 link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2) in needs_dsc_aux_workaround()
222 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in is_synaptics_cascaded_panamera()
223 IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) { in is_synaptics_cascaded_panamera()
662 if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) { in dm_handle_mst_sideband_msg_ready_event()
1280 (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT || in is_dsc_need_re_compute()
1281 dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))) in is_dsc_need_re_compute()
1535 &dc_link->dpcd_caps.dsc_caps.dsc_basic_caps; in is_link_to_dschub()
A Damdgpu_dm_debugfs.c576 struct dc_lttpr_caps caps = aconnector->dc_link->dpcd_caps.lttpr_caps; in dp_lttpr_status_show()
1045 seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0)); in psr_capability_show()
1046 if (link->dpcd_caps.psr_info.psr_version) in psr_capability_show()
1047 seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version); in psr_capability_show()
1346 struct dpcd_caps dpcd_caps; in dp_dsc_fec_support_show() local
1366 dpcd_caps = aconnector->dc_link->dpcd_caps; in dp_dsc_fec_support_show()
1378 is_fec_supported = dpcd_caps.fec_cap.raw & 0x1; in dp_dsc_fec_support_show()
1379 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
3316 dpcd_rev = link->dpcd_caps.dpcd_rev.raw; in edp_ilr_show()
3388 if (param[1] >= link->dpcd_caps.edp_supported_link_rates_count) in edp_ilr_write()
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/linux/drivers/gpu/drm/amd/display/modules/power/
A Dpower_helpers.c821 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in is_psr_su_specific_panel() local
823 if (dpcd_caps->edp_rev >= DP_EDP_14) { in is_psr_su_specific_panel()
824 if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) in is_psr_su_specific_panel()
831 if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) { in is_psr_su_specific_panel()
839 ((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) || in is_psr_su_specific_panel()
840 (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07))) in is_psr_su_specific_panel()
842 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03) in is_psr_su_specific_panel()
844 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01) in is_psr_su_specific_panel()
846 else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1) in is_psr_su_specific_panel()
885 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in mod_power_calc_psr_configs() local
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/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddmub_psr.c389 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings()
390 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings()
397 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_psr_copy_settings()
399 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_psr_copy_settings()
402 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings()
403 (!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings()
405 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2, in dmub_psr_copy_settings()
412 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_0022B9 && in dmub_psr_copy_settings()
413 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_3, in dmub_psr_copy_settings()
420 if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) in dmub_psr_copy_settings()
A Ddmub_replay.c167 copy_settings_data->pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line; in dmub_replay_copy_settings()
168 copy_settings_data->max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line; in dmub_replay_copy_settings()
178 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_replay_copy_settings()
180 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_replay_copy_settings()
183 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_replay_copy_settings()
184 (!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_replay_copy_settings()
186 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2, in dmub_replay_copy_settings()
/linux/drivers/gpu/drm/amd/display/dc/hdcp/
A Dhdcp_msg.c351 (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER || in get_protection_properties_by_signal()
352 link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) { in get_protection_properties_by_signal()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_exports.c323 if (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_DVI_DONGLE && in dc_link_get_highest_encoding_format()
324 link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE) in dc_link_get_highest_encoding_format()
/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
A Dlink_dp_cts.c754 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in dp_set_test_pattern()
774 } else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 || in dp_set_test_pattern()
775 link->dpcd_caps.dpcd_rev.raw == 0) { in dp_set_test_pattern()
/linux/drivers/gpu/drm/amd/display/dc/link/hwss/
A Dlink_hwss_dio_fixed_vs_pe_retimer.c83 if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED) in set_dio_fixed_vs_pe_retimer_dp_link_test_pattern_override()

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