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Searched refs:dppclk_khz (Results 1 – 25 of 37) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c111 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
117 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
121 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto()
123 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn20_update_clocks_update_dpp_dto()
296 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn2_update_clocks()
297 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn2_update_clocks()
299 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in dcn2_update_clocks()
374 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) { in dcn2_update_clocks_fpga()
375 clk_mgr->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn2_update_clocks_fpga()
391 clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz; in dcn2_update_clocks_fpga()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c114 int dpp_inst, dppclk_khz, prev_dppclk_khz; in rn_update_clocks_update_dpp_dto() local
120 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in rn_update_clocks_update_dpp_dto()
126 clk_mgr->dccg, dpp_inst, dppclk_khz); in rn_update_clocks_update_dpp_dto()
187 if (new_clocks->dppclk_khz < 100000 && new_clocks->dppclk_khz > 0) in rn_update_clocks()
188 new_clocks->dppclk_khz = 100000; in rn_update_clocks()
195 new_clocks->dppclk_khz = clk_mgr_base->clks.dppclk_khz; in rn_update_clocks()
199 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks()
200 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in rn_update_clocks()
202 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in rn_update_clocks()
218 clk_mgr_base->clks.dppclk_khz, in rn_update_clocks()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
A Ddcn35_clk_mgr.c203 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn35_update_clocks_update_dpp_dto()
224 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn35_update_clocks_update_dpp_dto()
372 if (new_clocks->dppclk_khz < 100000) in dcn35_update_clocks()
373 new_clocks->dppclk_khz = 100000; in dcn35_update_clocks()
375 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn35_update_clocks()
376 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn35_update_clocks()
378 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn35_update_clocks()
426 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn35_update_clocks()
475 else if (a->dppclk_khz != b->dppclk_khz) in dcn35_are_clock_states_equal()
1029 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) { in dcn35_update_clocks_fpga()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
A Ddcn201_clk_mgr.c143 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn201_update_clocks()
144 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn201_update_clocks()
146 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in dcn201_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
A Ddcn32_clk_mgr.c302 if (new_clocks->dppclk_khz) { in dcn32_update_dppclk_dispclk_freq()
321 int dpp_inst = 0, dppclk_khz, prev_dppclk_khz; in dcn32_update_clocks_update_dpp_dto() local
323 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn32_update_clocks_update_dpp_dto()
342 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn32_update_clocks_update_dpp_dto()
344 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn32_update_clocks_update_dpp_dto()
562 new_clocks->dppclk_khz > 0) { in dcn32_auto_dpm_test_log()
604 new_clocks->dppclk_khz, in dcn32_auto_dpm_test_log()
771 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn32_update_clocks()
772 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn32_update_clocks()
775 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn32_update_clocks()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_clk_mgr.c202 if (new_clocks->dppclk_khz < 100000) in dcn316_update_clocks()
203 new_clocks->dppclk_khz = 100000; in dcn316_update_clocks()
207 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn316_update_clocks()
208 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn316_update_clocks()
210 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn316_update_clocks()
227 dcn316_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn316_update_clocks()
231 dcn316_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn316_update_clocks()
233 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn316_update_clocks()
245 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn316_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c213 if (new_clocks->dppclk_khz < 100000) in dcn31_update_clocks()
214 new_clocks->dppclk_khz = 100000; in dcn31_update_clocks()
216 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn31_update_clocks()
217 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn31_update_clocks()
219 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn31_update_clocks()
236 dcn31_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn31_update_clocks()
240 dcn31_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn31_update_clocks()
242 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn31_update_clocks()
254 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn31_update_clocks()
314 else if (a->dppclk_khz != b->dppclk_khz) in dcn31_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
A Ddcn401_clk_mgr.c438 new_clocks->dppclk_khz > 0) { in dcn401_auto_dpm_test_log()
481 new_clocks->dppclk_khz, in dcn401_auto_dpm_test_log()
539 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn401_update_clocks_update_dpp_dto()
750 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn401_update_clocks_legacy()
751 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn401_update_clocks_legacy()
754 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn401_update_clocks_legacy()
794 clk_mgr_base->clks.dppclk_khz); in dcn401_update_clocks_legacy()
1278 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn401_build_update_display_clocks_sequence()
1279 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn401_build_update_display_clocks_sequence()
1282 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn401_build_update_display_clocks_sequence()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_clk_mgr.c195 if (new_clocks->dppclk_khz < MIN_DPP_DISP_CLK) in dcn315_update_clocks()
196 new_clocks->dppclk_khz = MIN_DPP_DISP_CLK; in dcn315_update_clocks()
200 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn315_update_clocks()
201 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn315_update_clocks()
203 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn315_update_clocks()
223 dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn315_update_clocks()
227 dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn315_update_clocks()
229 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn315_update_clocks()
241 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn315_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c154 if (new_clocks->dppclk_khz < 100000) in vg_update_clocks()
155 new_clocks->dppclk_khz = 100000; in vg_update_clocks()
157 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in vg_update_clocks()
158 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in vg_update_clocks()
160 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in vg_update_clocks()
174 dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in vg_update_clocks()
178 dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in vg_update_clocks()
470 else if (a->dppclk_khz != b->dppclk_khz) in vg_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c286 if (new_clocks->dppclk_khz < 100000) in dcn314_update_clocks()
287 new_clocks->dppclk_khz = 100000; in dcn314_update_clocks()
289 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn314_update_clocks()
290 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn314_update_clocks()
292 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn314_update_clocks()
309 dcn314_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn314_update_clocks()
313 dcn314_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn314_update_clocks()
315 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn314_update_clocks()
327 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn314_update_clocks()
374 else if (a->dppclk_khz != b->dppclk_khz) in dcn314_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c285 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks()
286 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn3_update_clocks()
289 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn3_update_clocks()
290 …30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_khz)); in dcn3_update_clocks()
440 else if (a->dppclk_khz != b->dppclk_khz) in dcn3_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A Drv1_clk_mgr.c41 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in rv1_determine_dppclk_threshold()
44 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz; in rv1_determine_dppclk_threshold()
93 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
183 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml2_utils.c286 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dml2_calculate_rq_and_dlg_params()
335 …context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_res.bw.dppclk_khz = dml_get_dppclk_calculated(&… in dml2_calculate_rq_and_dlg_params()
336 …if (context->bw_ctx.bw.dcn.clk.dppclk_khz < context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_res… in dml2_calculate_rq_and_dlg_params()
337 …context->bw_ctx.bw.dcn.clk.dppclk_khz = context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_res.bw.… in dml2_calculate_rq_and_dlg_params()
361 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dml2_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_utils.c329 pipe_ctx->plane_res.bw.dppclk_khz = pln_prog->min_clocks.dcn4x.dppclk_khz; in dml21_program_dc_pipe()
330 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipe_ctx->plane_res.bw.dppclk_khz) in dml21_program_dc_pipe()
331 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipe_ctx->plane_res.bw.dppclk_khz; in dml21_program_dc_pipe()
A Ddml21_wrapper.c129 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dml21_calculate_rq_and_dlg_params()
169 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dml21_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_debug.c354 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
362 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
A Ddml2_dpmm_dcn4.c354 …result = round_up_to_next_dpm(&display_cfg->plane_programming[i].min_clocks.dcn4x.dppclk_khz, &sta… in map_min_clocks_to_dpm()
580 …in_out->programming->min_clocks.dcn4x.dpprefclk_khz < mode_support_result->per_plane[i].dppclk_khz) in map_mode_to_soc_dpm()
581 …in_out->programming->min_clocks.dcn4x.dpprefclk_khz = mode_support_result->per_plane[i].dppclk_khz; in map_mode_to_soc_dpm()
608 …in_out->programming->plane_programming[i].min_clocks.dcn4x.dppclk_khz = (unsigned long)(in_out->pr… in map_mode_to_soc_dpm()
609 …* math_ceil2(in_out->display_cfg->mode_support_result.per_plane[i].dppclk_khz * (1.0 + in_out->soc… in map_mode_to_soc_dpm()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_trace.h495 __field(int, dppclk_khz)
514 __entry->dppclk_khz = clk->dppclk_khz;
538 __entry->dppclk_khz,
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_types.h230 unsigned long dppclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h316 int dppclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddcn31_fpu.c566 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
574 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.c527 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
1558 if (dc->clk_mgr && dc->clk_mgr->clks.dispclk_khz != 0 && dc->clk_mgr->clks.dppclk_khz != 0) { in dcn10_init_hw()
1560 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz = dc->clk_mgr->clks.dppclk_khz; in dcn10_init_hw()
2814 context->bw_ctx.bw.dcn.clk.dppclk_khz <= in dcn10_update_dchubp_dpp()
2826 pipe_ctx->plane_res.bw.dppclk_khz); in dcn10_update_dchubp_dpp()
2828 dc->clk_mgr->clks.dppclk_khz = should_divided_by_2 ? in dcn10_update_dchubp_dpp()
3934 current_clocks->dppclk_khz = clk_khz; in dcn10_set_clock()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
A Ddml2_internal_shared_types.h218 unsigned int dppclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1173 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn20_calculate_dlg_params()
1199 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn20_calculate_dlg_params()
1200 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn20_calculate_dlg_params()
1201 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = in dcn20_calculate_dlg_params()
1217 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dcn20_calculate_dlg_params()

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