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Searched refs:dwb_pipe_inst (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
A Ddcn30_hwseq.c417 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn30_set_writeback()
426 wb_info->dwb_pipe_inst, wb_info->mpcc_inst); in dcn30_set_writeback()
438 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_update_writeback()
440 __func__, wb_info->dwb_pipe_inst,\ in dcn30_update_writeback()
515 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_enable_writeback()
519 __func__, wb_info->dwb_pipe_inst,\ in dcn30_enable_writeback()
536 unsigned int dwb_pipe_inst) in dcn30_disable_writeback() argument
541 ASSERT(dwb_pipe_inst < MAX_DWB_PIPES); in dcn30_disable_writeback()
542 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn30_disable_writeback()
543 mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst]; in dcn30_disable_writeback()
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A Ddcn30_hwseq.h48 unsigned int dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_stream.c474 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_add_writeback()
483 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
491 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) { in dc_stream_add_writeback()
532 uint32_t dwb_pipe_inst) in dc_stream_fc_disable_writeback() argument
534 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dc_stream_fc_disable_writeback()
541 if (dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_fc_disable_writeback()
561 uint32_t dwb_pipe_inst) in dc_stream_remove_writeback() argument
569 if (dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_remove_writeback()
583 if (stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst) in dc_stream_remove_writeback()
606 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dc_stream_remove_writeback()
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/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_stream.h97 int dwb_pipe_inst; member
437 uint32_t dwb_pipe_inst);
441 uint32_t dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/
A Ddcn20_optc.c244 uint32_t dwb_pipe_inst) in optc2_set_dwb_source() argument
248 if (dwb_pipe_inst == 0) in optc2_set_dwb_source()
251 else if (dwb_pipe_inst == 1) in optc2_set_dwb_source()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.h120 unsigned int dwb_pipe_inst);
A Ddcn20_hwseq.c2507 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_enable_writeback()
2509 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2510 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
2514 optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst); in dcn20_enable_writeback()
2517 …config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]); in dcn20_enable_writeback()
2527 unsigned int dwb_pipe_inst) in dcn20_disable_writeback() argument
2532 ASSERT(dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_disable_writeback()
2533 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn20_disable_writeback()
2534 mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst]; in dcn20_disable_writeback()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dtiming_generator.h275 uint32_t dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/hwss/
A Dhw_sequencer.h332 unsigned int dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm.c9665 wb_info->dwb_pipe_inst = 0; in dm_set_writeback()

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