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/linux/drivers/net/ethernet/mellanox/mlx5/core/
A DMakefile25 mlx5_core-$(CONFIG_MLX5_CORE_EN) += en/rqt.o en/tir.o en/rss.o en/rx_res.o \
28 en_selftest.o en/port.o en/monitor_stats.o en/health.o \
29 en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/pool.o \
30 en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o en/devlink.o en/ptp.o \
31 en/qos.o en/htb.o en/trap.o en/fs_tt_redirect.o en/selq.o \
47 en/tc_tun_vxlan.o en/tc_tun_gre.o en/tc_tun_geneve.o \
49 en/tc/post_act.o en/tc/int_port.o en/tc/meter.o \
53 en/tc/act/accept.o en/tc/act/mark.o en/tc/act/goto.o \
54 en/tc/act/tun.o en/tc/act/csum.o en/tc/act/pedit.o \
55 en/tc/act/vlan.o en/tc/act/vlan_mangle.o en/tc/act/mpls.o \
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/
A Dhw_translate_dce60.c67 uint32_t *en) in offset_to_id() argument
105 *en = GPIO_HPD_1; in offset_to_id()
108 *en = GPIO_HPD_2; in offset_to_id()
111 *en = GPIO_HPD_3; in offset_to_id()
212 uint32_t en, in id_to_offset() argument
220 switch (en) { in id_to_offset()
252 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
313 switch (en) { in id_to_offset()
338 switch (en) { in id_to_offset()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/
A Dhw_translate_dce80.c67 uint32_t *en) in offset_to_id() argument
105 *en = GPIO_HPD_1; in offset_to_id()
108 *en = GPIO_HPD_2; in offset_to_id()
111 *en = GPIO_HPD_3; in offset_to_id()
212 uint32_t en, in id_to_offset() argument
220 switch (en) { in id_to_offset()
252 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
313 switch (en) { in id_to_offset()
338 switch (en) { in id_to_offset()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/
A Dhw_translate_dce110.c43 uint32_t *en) in offset_to_id() argument
81 *en = GPIO_HPD_1; in offset_to_id()
84 *en = GPIO_HPD_2; in offset_to_id()
87 *en = GPIO_HPD_3; in offset_to_id()
183 uint32_t en, in id_to_offset() argument
191 switch (en) { in id_to_offset()
223 switch (en) { in id_to_offset()
255 switch (en) { in id_to_offset()
284 switch (en) { in id_to_offset()
309 switch (en) { in id_to_offset()
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
A Dhw_translate_dce120.c65 uint32_t *en) in offset_to_id() argument
103 *en = GPIO_HPD_1; in offset_to_id()
106 *en = GPIO_HPD_2; in offset_to_id()
109 *en = GPIO_HPD_3; in offset_to_id()
205 uint32_t en, in id_to_offset() argument
213 switch (en) { in id_to_offset()
245 switch (en) { in id_to_offset()
277 switch (en) { in id_to_offset()
306 switch (en) { in id_to_offset()
331 switch (en) { in id_to_offset()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
A Dhw_translate_dcn10.c65 uint32_t *en) in offset_to_id() argument
103 *en = GPIO_HPD_1; in offset_to_id()
106 *en = GPIO_HPD_2; in offset_to_id()
109 *en = GPIO_HPD_3; in offset_to_id()
205 uint32_t en, in id_to_offset() argument
213 switch (en) { in id_to_offset()
245 switch (en) { in id_to_offset()
277 switch (en) { in id_to_offset()
306 switch (en) { in id_to_offset()
331 switch (en) { in id_to_offset()
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A Dhw_factory_dcn10.c155 generic->regs = &generic_regs[en]; in define_generic_registers()
156 generic->shifts = &generic_shift[en]; in define_generic_registers()
157 generic->masks = &generic_mask[en]; in define_generic_registers()
158 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
163 uint32_t en) in define_ddc_registers() argument
169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
190 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
A Dhw_translate_dcn20.c69 uint32_t *en) in offset_to_id() argument
107 *en = GPIO_HPD_1; in offset_to_id()
110 *en = GPIO_HPD_2; in offset_to_id()
113 *en = GPIO_HPD_3; in offset_to_id()
116 *en = GPIO_HPD_4; in offset_to_id()
194 uint32_t en, in id_to_offset() argument
202 switch (en) { in id_to_offset()
232 switch (en) { in id_to_offset()
262 switch (en) { in id_to_offset()
291 switch (en) { in id_to_offset()
[all …]
A Dhw_factory_dcn20.c183 uint32_t en) in define_ddc_registers() argument
189 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
193 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
201 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
202 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
210 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
213 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
220 generic->regs = &generic_regs[en]; in define_generic_registers()
221 generic->shifts = &generic_shift[en]; in define_generic_registers()
222 generic->masks = &generic_mask[en]; in define_generic_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
A Dhw_translate_dcn30.c74 uint32_t *en) in offset_to_id() argument
112 *en = GPIO_HPD_1; in offset_to_id()
115 *en = GPIO_HPD_2; in offset_to_id()
118 *en = GPIO_HPD_3; in offset_to_id()
121 *en = GPIO_HPD_4; in offset_to_id()
199 uint32_t en, in id_to_offset() argument
207 switch (en) { in id_to_offset()
237 switch (en) { in id_to_offset()
267 switch (en) { in id_to_offset()
296 switch (en) { in id_to_offset()
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A Dhw_factory_dcn30.c192 generic->regs = &generic_regs[en]; in define_generic_registers()
193 generic->shifts = &generic_shift[en]; in define_generic_registers()
194 generic->masks = &generic_mask[en]; in define_generic_registers()
195 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
200 uint32_t en) in define_ddc_registers() argument
206 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
210 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
218 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
219 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
227 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
A Dhw_translate_dcn21.c68 uint32_t *en) in offset_to_id() argument
106 *en = GPIO_HPD_1; in offset_to_id()
109 *en = GPIO_HPD_2; in offset_to_id()
112 *en = GPIO_HPD_3; in offset_to_id()
115 *en = GPIO_HPD_4; in offset_to_id()
190 uint32_t en, in id_to_offset() argument
198 switch (en) { in id_to_offset()
225 switch (en) { in id_to_offset()
252 switch (en) { in id_to_offset()
281 switch (en) { in id_to_offset()
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A Dhw_factory_dcn21.c163 generic->regs = &generic_regs[en]; in define_generic_registers()
164 generic->shifts = &generic_shift[en]; in define_generic_registers()
165 generic->masks = &generic_mask[en]; in define_generic_registers()
166 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
171 uint32_t en) in define_ddc_registers() argument
177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
181 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
189 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
190 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
198 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
A Dhw_translate_dcn315.c69 uint32_t *en) in offset_to_id() argument
107 *en = GPIO_HPD_1; in offset_to_id()
110 *en = GPIO_HPD_2; in offset_to_id()
113 *en = GPIO_HPD_3; in offset_to_id()
116 *en = GPIO_HPD_4; in offset_to_id()
191 uint32_t en, in id_to_offset() argument
199 switch (en) { in id_to_offset()
226 switch (en) { in id_to_offset()
253 switch (en) { in id_to_offset()
282 switch (en) { in id_to_offset()
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A Dhw_factory_dcn315.c184 generic->regs = &generic_regs[en]; in define_generic_registers()
185 generic->shifts = &generic_shift[en]; in define_generic_registers()
186 generic->masks = &generic_mask[en]; in define_generic_registers()
187 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
192 uint32_t en) in define_ddc_registers() argument
198 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
202 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
210 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
211 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
219 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
A Dhw_translate_dcn32.c67 uint32_t *en) in offset_to_id() argument
102 *en = GPIO_HPD_1; in offset_to_id()
105 *en = GPIO_HPD_2; in offset_to_id()
108 *en = GPIO_HPD_3; in offset_to_id()
111 *en = GPIO_HPD_4; in offset_to_id()
172 uint32_t en, in id_to_offset() argument
180 switch (en) { in id_to_offset()
207 switch (en) { in id_to_offset()
234 switch (en) { in id_to_offset()
260 switch (en) { in id_to_offset()
[all …]
A Dhw_factory_dcn32.c196 generic->regs = &generic_regs[en]; in define_generic_registers()
197 generic->shifts = &generic_shift[en]; in define_generic_registers()
198 generic->masks = &generic_mask[en]; in define_generic_registers()
199 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
204 uint32_t en) in define_ddc_registers() argument
210 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
214 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
222 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
223 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
231 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
A Dhw_translate_dcn401.c42 uint32_t *en) in offset_to_id() argument
77 *en = GPIO_HPD_1; in offset_to_id()
80 *en = GPIO_HPD_2; in offset_to_id()
83 *en = GPIO_HPD_3; in offset_to_id()
86 *en = GPIO_HPD_4; in offset_to_id()
156 uint32_t en, in id_to_offset() argument
164 switch (en) { in id_to_offset()
191 switch (en) { in id_to_offset()
218 switch (en) { in id_to_offset()
244 switch (en) { in id_to_offset()
[all …]
A Dhw_factory_dcn401.c188 generic->regs = &generic_regs[en]; in define_generic_registers()
189 generic->shifts = &generic_shift[en]; in define_generic_registers()
190 generic->masks = &generic_mask[en]; in define_generic_registers()
191 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
196 uint32_t en) in define_ddc_registers() argument
202 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
206 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
214 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
215 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
223 hpd->regs = &hpd_regs[en]; in define_hpd_registers()
[all …]
/linux/fs/f2fs/
A Dextent_cache.c166 else if (fofs >= en->ei.fofs + en->ei.len) in __lookup_extent_node()
204 if (en && en->ei.fofs <= fofs && en->ei.fofs + en->ei.len > fofs) in __lookup_extent_node_ret()
215 } else if (fofs >= en->ei.fofs + en->ei.len) { in __lookup_extent_node_ret()
245 if (fofs == en->ei.fofs + en->ei.len - 1) { in __lookup_extent_node_ret()
266 if (!en) in __attach_extent_node()
467 if (!en) in __lookup_extent_tree()
513 if (en) in __try_merge_extent_node()
519 if (!en) in __try_merge_extent_node()
634 while (en && en->ei.fofs < end) { in __update_extent_tree_range()
646 en->ei.len = fofs - en->ei.fofs; in __update_extent_tree_range()
[all …]
/linux/net/netfilter/ipvs/
A Dip_vs_lblc.c136 kfree(en); in ip_vs_lblc_rcu_free()
169 unsigned int hash = ip_vs_lblc_hashkey(en->af, &en->addr); in ip_vs_lblc_hash()
186 return en; in ip_vs_lblc_get()
203 if (en) { in ip_vs_lblc_new()
205 return en; in ip_vs_lblc_new()
208 en = kmalloc(sizeof(*en), GFP_ATOMIC); in ip_vs_lblc_new()
209 if (!en) in ip_vs_lblc_new()
212 en->af = af; in ip_vs_lblc_new()
217 en->dest = dest; in ip_vs_lblc_new()
221 return en; in ip_vs_lblc_new()
[all …]
A Dip_vs_lblcr.c332 unsigned int hash = ip_vs_lblcr_hashkey(en->af, &en->addr); in ip_vs_lblcr_hash()
349 return en; in ip_vs_lblcr_get()
366 if (!en) { in ip_vs_lblcr_new()
367 en = kmalloc(sizeof(*en), GFP_ATOMIC); in ip_vs_lblcr_new()
368 if (!en) in ip_vs_lblcr_new()
371 en->af = af; in ip_vs_lblcr_new()
373 en->lastuse = jiffies; in ip_vs_lblcr_new()
382 return en; in ip_vs_lblcr_new()
387 return en; in ip_vs_lblcr_new()
405 ip_vs_lblcr_free(en); in ip_vs_lblcr_flush()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/
A Dgpio_service.c132 uint32_t en; in dal_gpio_service_create_irq() local
148 uint32_t en; in dal_gpio_service_create_generic_mux() local
179 uint32_t en) in dal_gpio_get_generic_pin_info() argument
240 uint32_t en) in is_pin_busy() argument
251 uint32_t en) in set_pin_busy() argument
262 uint32_t en) in set_pin_free() argument
273 uint32_t en) in dal_gpio_service_lock() argument
287 uint32_t en) in dal_gpio_service_unlock() argument
303 uint32_t en = gpio->en; in dal_gpio_service_open() local
437 uint32_t en) in dal_gpio_create_irq() argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dgpio.h42 uint32_t en; member
57 uint32_t en);
61 uint32_t en);
65 uint32_t en);
69 uint32_t en);
73 uint32_t en);
77 uint32_t en);
81 uint32_t en);
88 uint32_t *en);
91 uint32_t en,
/linux/Documentation/translations/sp_SP/
A Dindex.rst19 simplemente para aquellos que prefieran leer en el idioma español. Sin
20 embargo, tenga en cuenta que la *única* documentación oficial es la que
21 está en inglés: :ref:`linux_doc`
23 La propagación simultánea de la traducción de una modificación en
27 esté actualizada con las últimas modificaciones. Si lo que lee en una
28 traducción no se corresponde con lo que ve en el código fuente, informe
35 contenidos deberá ser realizada anteriormente en los documentos en inglés.
48 en inglés serán reemplazadas por las palabras correspondientes en español.
59 pero en caso de duda se puede consultar a los maintainers.
69 constante desarrollo. Las mejoras en la documentación siempre son
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