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Searched refs:engine_mask (Results 1 – 25 of 41) sorted by relevance

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/linux/drivers/gpu/drm/i915/gt/
A Dintel_reset.c159 intel_engine_mask_t engine_mask, in i915_do_reset() argument
188 intel_engine_mask_t engine_mask, in g33_do_reset() argument
198 intel_engine_mask_t engine_mask, in g4x_do_reset() argument
328 if (engine_mask == ALL_ENGINES) { in __gen6_reset_engines()
531 if (engine_mask == ALL_ENGINES) { in __gen11_reset_engines()
722 return engine_mask; in wa_14015076503_start()
740 engine_mask = gt->info.engine_mask & ~BIT(GSC0); in wa_14015076503_start()
753 return engine_mask; in wa_14015076503_start()
1396 u32 engine_mask, in intel_gt_reset_global() argument
1466 engine_mask &= gt->info.engine_mask; in intel_gt_handle_error()
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A Dintel_gt_types.h262 intel_engine_mask_t engine_mask; member
308 intel_engine_mask_t engine_mask; member
A Dintel_breadcrumbs_types.h50 intel_engine_mask_t engine_mask; member
A Dintel_engine_cs.c790 gt->info.engine_mask &= ~BIT(_VCS(i)); in engine_mask_apply_media_fuses()
809 gt->info.engine_mask &= ~BIT(_VECS(i)); in engine_mask_apply_media_fuses()
838 info->engine_mask &= ~BIT(_CCS(i)); in engine_mask_apply_compute_fuses()
857 GEM_BUG_ON(!info->engine_mask); in init_engine_mask()
876 info->engine_mask &= ~BIT(GSC0); in init_engine_mask()
897 info->engine_mask &= ~GENMASK(CCS3, CCS0); in init_engine_mask()
899 info->engine_mask |= BIT(_CCS(first_ccs)); in init_engine_mask()
902 return info->engine_mask; in init_engine_mask()
963 drm_WARN_ON(&i915->drm, engine_mask == 0); in intel_engines_init_mmio()
964 drm_WARN_ON(&i915->drm, engine_mask & in intel_engines_init_mmio()
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A Dintel_gt.c244 intel_engine_mask_t engine_mask) in intel_gt_clear_error_registers() argument
296 for_each_engine_masked(engine, gt, engine_mask, id) in intel_gt_clear_error_registers()
924 gt->info.engine_mask = INTEL_INFO(i915)->platform_engine_mask; in intel_gt_probe_all()
946 gt->info.engine_mask = gtdef->engine_mask; in intel_gt_probe_all()
1006 drm_printf(p, "available engines: %x\n", info->engine_mask); in intel_gt_info_print()
A Dintel_gt.h150 intel_engine_mask_t engine_mask);
193 for ((tmp__) = (mask__) & (gt__)->info.engine_mask; \
A Dintel_reset.h26 intel_engine_mask_t engine_mask,
/linux/drivers/gpu/drm/i915/gvt/
A Dscheduler.h148 intel_engine_mask_t engine_mask);
153 intel_engine_mask_t engine_mask,
167 intel_engine_mask_t engine_mask);
A Dvgpu.c436 intel_engine_mask_t engine_mask) in intel_gvt_reset_vgpu_locked() argument
440 intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask; in intel_gvt_reset_vgpu_locked()
444 vgpu->id, dmlr, engine_mask); in intel_gvt_reset_vgpu_locked()
461 if (engine_mask == ALL_ENGINES || dmlr) { in intel_gvt_reset_vgpu_locked()
463 if (engine_mask == ALL_ENGINES) in intel_gvt_reset_vgpu_locked()
A Dexeclist.c523 intel_engine_mask_t engine_mask) in clean_execlist() argument
529 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { in clean_execlist()
537 intel_engine_mask_t engine_mask) in reset_execlist() argument
542 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) in reset_execlist()
547 intel_engine_mask_t engine_mask) in init_execlist() argument
549 reset_execlist(vgpu, engine_mask); in init_execlist()
A Dgvt.h145 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
146 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
147 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
500 intel_engine_mask_t engine_mask);
A Dscheduler.c1048 intel_engine_mask_t engine_mask) in intel_vgpu_clean_workloads() argument
1056 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { in intel_vgpu_clean_workloads()
1343 intel_engine_mask_t engine_mask) in intel_vgpu_reset_submission() argument
1350 intel_vgpu_clean_workloads(vgpu, engine_mask); in intel_vgpu_reset_submission()
1351 s->ops->reset(vgpu, engine_mask); in intel_vgpu_reset_submission()
1467 intel_engine_mask_t engine_mask, in intel_vgpu_select_submission_ops() argument
1482 interface == 0 && engine_mask != ALL_ENGINES)) in intel_vgpu_select_submission_ops()
1486 s->ops->clean(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
1496 ret = ops[interface]->init(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
/linux/drivers/gpu/drm/xe/
A Dxe_hw_engine.c471 if (!(gt->info.engine_mask & BIT(id))) in hw_engine_init_early()
630 if (!(gt->info.engine_mask & BIT(i))) in read_media_fuses()
634 gt->info.engine_mask &= ~BIT(i); in read_media_fuses()
640 if (!(gt->info.engine_mask & BIT(i))) in read_media_fuses()
644 gt->info.engine_mask &= ~BIT(i); in read_media_fuses()
665 if (!(gt->info.engine_mask & BIT(i))) in read_copy_fuses()
669 gt->info.engine_mask &= ~BIT(i); in read_copy_fuses()
683 if (hweight64(gt->info.engine_mask & in read_compute_fuses_from_dss()
696 gt->info.engine_mask &= ~BIT(i); in read_compute_fuses_from_dss()
715 gt->info.engine_mask &= ~BIT(i); in read_compute_fuses_from_reg()
[all …]
A Dxe_force_wake.c72 if (!(gt->info.engine_mask & BIT(i))) in xe_force_wake_init_engines()
82 if (!(gt->info.engine_mask & BIT(i))) in xe_force_wake_init_engines()
91 if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0)) in xe_force_wake_init_engines()
A Dxe_gt.h22 #define CCS_MASK(gt) (((gt)->info.engine_mask & XE_HW_ENGINE_CCS_MASK) >> XE_HW_ENGINE_CCS0)
A Dxe_gt_types.h128 u64 engine_mask; member
A Dxe_pci.c709 gt->info.engine_mask = graphics_desc->hw_engine_mask; in xe_info_init()
711 gt->info.engine_mask |= media_desc->hw_engine_mask; in xe_info_init()
727 gt->info.engine_mask = media_desc->hw_engine_mask; in xe_info_init()
/linux/drivers/gpu/drm/i915/
A Di915_gpu_error.h276 intel_engine_mask_t engine_mask);
279 intel_engine_mask_t engine_mask) in intel_klog_error_capture() argument
290 intel_engine_mask_t engine_mask, u32 dump_flags);
352 i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_capture_error_state() argument
A Di915_drv.h624 #define __HAS_ENGINE(engine_mask, id) ((engine_mask) & BIT(id)) argument
625 #define HAS_ENGINE(gt, id) __HAS_ENGINE((gt)->info.engine_mask, id)
634 __ENGINE_INSTANCES_MASK((gt)->info.engine_mask, first, count)
A Di915_gpu_error.c1681 intel_engine_mask_t engine_mask, in gt_record_engines() argument
1698 ee->hung = engine->mask & engine_mask; in gt_record_engines()
2097 __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in __i915_gpu_coredump() argument
2133 gt_record_engines(error->gt, engine_mask, compress, dump_flags); in __i915_gpu_coredump()
2147 i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_gpu_coredump() argument
2156 dump = __i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_gpu_coredump()
2203 intel_engine_mask_t engine_mask, u32 dump_flags) in i915_capture_error_state() argument
2207 error = i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_capture_error_state()
2255 intel_engine_mask_t engine_mask) in intel_klog_error_capture() argument
2282 error = i915_gpu_coredump(gt, engine_mask, CORE_DUMP_FLAG_NONE); in intel_klog_error_capture()
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_umsch_mm.h49 uint32_t engine_mask; member
169 uint32_t engine_mask; member
/linux/drivers/gpu/drm/i915/gt/uc/
A Dintel_gsc_uc.c108 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); in gsc_engine_supported()
113 mask = gt->info.engine_mask; in gsc_engine_supported()
A Dintel_huc.c257 intel_engine_mask_t mask = gt->info.engine_mask; in vcs_supported()
268 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); in vcs_supported()
273 mask = gt->info.engine_mask; in vcs_supported()
/linux/drivers/net/wireless/mediatek/mt76/
A Dmt76x02_dfs.c617 u32 engine_mask; in mt76x02_dfs_tasklet() local
641 engine_mask = mt76_rr(dev, MT_BBP(DFS, 1)); in mt76x02_dfs_tasklet()
642 if (!(engine_mask & 0xf)) in mt76x02_dfs_tasklet()
648 if (!(engine_mask & (1 << i))) in mt76x02_dfs_tasklet()
/linux/drivers/gpu/drm/i915/selftests/
A Dmock_gem_device.c231 to_gt(i915)->info.engine_mask = BIT(0); in mock_gem_device()

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