| /linux/include/drm/ |
| A D | drm_fixed.h | 34 } fixed20_12; typedef
47 static inline u32 dfixed_floor(fixed20_12 A) in dfixed_floor()
54 static inline u32 dfixed_ceil(fixed20_12 A) in dfixed_ceil()
64 static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) in dfixed_div()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | rs690.c | 72 fixed20_12 tmp; in rs690_pm_info()
261 fixed20_12 num_line_pair;
262 fixed20_12 estimated_width;
264 fixed20_12 consumption_rate;
265 fixed20_12 active_time;
266 fixed20_12 dbpp;
267 fixed20_12 priority_mark_max;
268 fixed20_12 priority_mark;
269 fixed20_12 sclk;
278 fixed20_12 a, b, c; in rs690_crtc_bandwidth_compute()
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| A D | rv515.c | 912 fixed20_12 num_line_pair;
913 fixed20_12 estimated_width;
915 fixed20_12 consumption_rate;
916 fixed20_12 active_time;
917 fixed20_12 dbpp;
918 fixed20_12 priority_mark_max;
919 fixed20_12 priority_mark;
920 fixed20_12 sclk;
929 fixed20_12 a, b, c; in rv515_crtc_bandwidth_compute()
932 fixed20_12 sclk; in rv515_crtc_bandwidth_compute()
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| A D | evergreen.c | 1955 fixed20_12 a; in evergreen_dram_bandwidth()
1975 fixed20_12 a; in evergreen_dram_bandwidth_for_display()
1995 fixed20_12 a; in evergreen_data_return_bandwidth()
2015 fixed20_12 a; in evergreen_dmif_request_bandwidth()
2046 fixed20_12 bpp; in evergreen_average_bandwidth()
2047 fixed20_12 line_time; in evergreen_average_bandwidth()
2048 fixed20_12 src_width; in evergreen_average_bandwidth()
2050 fixed20_12 a; in evergreen_average_bandwidth()
2076 fixed20_12 a, b, c; in evergreen_latency_watermark()
2135 fixed20_12 a; in evergreen_check_latency_hiding()
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| A D | radeon.h | 1592 fixed20_12 max_bandwidth;
1593 fixed20_12 igp_sideport_mclk;
1594 fixed20_12 igp_system_mclk;
1595 fixed20_12 igp_ht_link_clk;
1596 fixed20_12 igp_ht_link_width;
1597 fixed20_12 k8_bandwidth;
1599 fixed20_12 ht_bandwidth;
1600 fixed20_12 core_bandwidth;
1601 fixed20_12 sclk;
1602 fixed20_12 mclk;
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| A D | si.c | 2054 fixed20_12 a; in dce6_dram_bandwidth()
2074 fixed20_12 a; in dce6_dram_bandwidth_for_display()
2094 fixed20_12 a; in dce6_data_return_bandwidth()
2119 fixed20_12 a, b1, b2; in dce6_dmif_request_bandwidth()
2162 fixed20_12 bpp; in dce6_average_bandwidth()
2163 fixed20_12 line_time; in dce6_average_bandwidth()
2164 fixed20_12 src_width; in dce6_average_bandwidth()
2166 fixed20_12 a; in dce6_average_bandwidth()
2193 fixed20_12 a, b, c; in dce6_latency_watermark()
2254 fixed20_12 a; in dce6_check_latency_hiding()
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| A D | r100.c | 3170 fixed20_12 crit_point_ff = {0}; in r100_bandwidth_update()
3172 fixed20_12 memtcas_ff[8] = { in r100_bandwidth_update()
3181 fixed20_12 memtcas_rs480_ff[8] = { in r100_bandwidth_update()
3191 fixed20_12 memtcas2_ff[8] = { in r100_bandwidth_update()
3201 fixed20_12 memtrbs[8] = { in r100_bandwidth_update()
3211 fixed20_12 memtrbs_r4xx[8] = { in r100_bandwidth_update()
3221 fixed20_12 min_mem_eff; in r100_bandwidth_update()
3222 fixed20_12 mc_latency_sclk, mc_latency_mclk, k1; in r100_bandwidth_update()
3223 fixed20_12 cur_latency_mclk, cur_latency_sclk; in r100_bandwidth_update()
3226 fixed20_12 time_disp1_drop_priority; in r100_bandwidth_update()
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| A D | cik.c | 8928 fixed20_12 a; in dce8_dram_bandwidth()
8957 fixed20_12 a; in dce8_dram_bandwidth_for_display()
8986 fixed20_12 a; in dce8_data_return_bandwidth()
9015 fixed20_12 a, b; in dce8_dmif_request_bandwidth()
9066 fixed20_12 bpp; in dce8_average_bandwidth()
9067 fixed20_12 line_time; in dce8_average_bandwidth()
9068 fixed20_12 src_width; in dce8_average_bandwidth()
9069 fixed20_12 bandwidth; in dce8_average_bandwidth()
9070 fixed20_12 a; in dce8_average_bandwidth()
9106 fixed20_12 a, b, c; in dce8_latency_watermark()
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| A D | radeon_mode.h | 339 fixed20_12 vsc;
340 fixed20_12 hsc;
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| A D | radeon_device.c | 726 fixed20_12 a; in radeon_update_bandwidth_info()
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| A D | radeon_display.c | 1756 fixed20_12 a, b; in radeon_crtc_scaling_mode_fixup()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v6_0.c | 543 fixed20_12 a; in dce_v6_0_dram_bandwidth()
572 fixed20_12 a; in dce_v6_0_dram_bandwidth_for_display()
601 fixed20_12 a; in dce_v6_0_data_return_bandwidth()
630 fixed20_12 a, b; in dce_v6_0_dmif_request_bandwidth()
681 fixed20_12 bpp; in dce_v6_0_average_bandwidth()
682 fixed20_12 line_time; in dce_v6_0_average_bandwidth()
683 fixed20_12 src_width; in dce_v6_0_average_bandwidth()
685 fixed20_12 a; in dce_v6_0_average_bandwidth()
721 fixed20_12 a, b, c; in dce_v6_0_latency_watermark()
813 fixed20_12 a; in dce_v6_0_check_latency_hiding()
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| A D | dce_v8_0.c | 678 fixed20_12 a; in dce_v8_0_dram_bandwidth()
707 fixed20_12 a; in dce_v8_0_dram_bandwidth_for_display()
736 fixed20_12 a; in dce_v8_0_data_return_bandwidth()
765 fixed20_12 a, b; in dce_v8_0_dmif_request_bandwidth()
816 fixed20_12 bpp; in dce_v8_0_average_bandwidth()
817 fixed20_12 line_time; in dce_v8_0_average_bandwidth()
818 fixed20_12 src_width; in dce_v8_0_average_bandwidth()
819 fixed20_12 bandwidth; in dce_v8_0_average_bandwidth()
820 fixed20_12 a; in dce_v8_0_average_bandwidth()
856 fixed20_12 a, b, c; in dce_v8_0_latency_watermark()
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| A D | dce_v10_0.c | 725 fixed20_12 a; in dce_v10_0_dram_bandwidth()
754 fixed20_12 a; in dce_v10_0_dram_bandwidth_for_display()
783 fixed20_12 a; in dce_v10_0_data_return_bandwidth()
812 fixed20_12 a, b; in dce_v10_0_dmif_request_bandwidth()
863 fixed20_12 bpp; in dce_v10_0_average_bandwidth()
864 fixed20_12 line_time; in dce_v10_0_average_bandwidth()
865 fixed20_12 src_width; in dce_v10_0_average_bandwidth()
866 fixed20_12 bandwidth; in dce_v10_0_average_bandwidth()
867 fixed20_12 a; in dce_v10_0_average_bandwidth()
903 fixed20_12 a, b, c; in dce_v10_0_latency_watermark()
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| A D | dce_v11_0.c | 757 fixed20_12 a; in dce_v11_0_dram_bandwidth()
786 fixed20_12 a; in dce_v11_0_dram_bandwidth_for_display()
815 fixed20_12 a; in dce_v11_0_data_return_bandwidth()
844 fixed20_12 a, b; in dce_v11_0_dmif_request_bandwidth()
895 fixed20_12 bpp; in dce_v11_0_average_bandwidth()
896 fixed20_12 line_time; in dce_v11_0_average_bandwidth()
897 fixed20_12 src_width; in dce_v11_0_average_bandwidth()
898 fixed20_12 bandwidth; in dce_v11_0_average_bandwidth()
899 fixed20_12 a; in dce_v11_0_average_bandwidth()
935 fixed20_12 a, b, c; in dce_v11_0_latency_watermark()
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| A D | amdgpu_mode.h | 477 fixed20_12 vsc;
478 fixed20_12 hsc;
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| A D | amdgpu_display.c | 1496 fixed20_12 a, b; in amdgpu_display_crtc_scaling_mode_fixup()
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| /linux/include/drm/display/ |
| A D | drm_dp_mst_helper.h | 620 fixed20_12 pbn_div;
863 fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
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| /linux/drivers/gpu/drm/tegra/ |
| A D | hub.c | 522 static inline u32 compute_phase_incr(fixed20_12 in, unsigned int out) in compute_phase_incr()
604 fixed20_12 width = dfixed_init(new_state->src_w >> 16); in tegra_shared_plane_atomic_update()
615 fixed20_12 height = dfixed_init(new_state->src_h >> 16); in tegra_shared_plane_atomic_update()
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| A D | dc.c | 130 fixed20_12 outf = dfixed_init(out); in compute_dda_inc()
131 fixed20_12 inf = dfixed_init(in); in compute_dda_inc()
163 fixed20_12 inf = dfixed_init(in); in compute_initial_dda()
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| /linux/drivers/gpu/drm/tests/ |
| A D | drm_dp_mst_helper_test.c | 74 fixed20_12 expected;
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_dp_mst.c | 228 fixed20_12 pbn; in intel_dp_mst_find_vcpi_slots_for_bpp()
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| /linux/drivers/gpu/drm/display/ |
| A D | drm_dp_mst_topology.c | 3588 fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr, in drm_dp_get_vc_payload_bw()
3593 fixed20_12 ret; in drm_dp_get_vc_payload_bw()
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