Home
last modified time | relevance | path

Searched refs:gate_clks (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/clk/samsung/
A Dclk-exynos7.c193 .gate_clks = topc_gate_clks,
385 .gate_clks = top0_gate_clks,
567 .gate_clks = top1_gate_clks,
614 .gate_clks = ccore_gate_clks,
681 .gate_clks = peric0_gate_clks,
805 .gate_clks = peric1_gate_clks,
860 .gate_clks = peris_gate_clks,
970 .gate_clks = fsys0_gate_clks,
1101 .gate_clks = fsys1_gate_clks,
1214 .gate_clks = mscl_gate_clks,
[all …]
A Dclk-exynosautov9.c954 .gate_clks = top_gate_clks,
1014 .gate_clks = busmc_gate_clks,
1072 .gate_clks = core_gate_clks,
1151 .gate_clks = dpum_gate_clks,
1391 .gate_clks = fsys0_gate_clks,
1518 .gate_clks = fsys1_gate_clks,
1585 .gate_clks = fsys2_gate_clks,
1840 .gate_clks = peric0_gate_clks,
2095 .gate_clks = peric1_gate_clks,
2142 .gate_clks = peris_gate_clks,
A Dclk-exynos5260.c151 .gate_clks = aud_gate_clks,
341 .gate_clks = disp_gate_clks,
505 .gate_clks = fsys_gate_clks,
596 .gate_clks = g2d_gate_clks,
659 .gate_clks = g3d_gate_clks,
792 .gate_clks = gscl_gate_clks,
911 .gate_clks = isp_gate_clks,
1031 .gate_clks = mfc_gate_clks,
1180 .gate_clks = mif_gate_clks,
1386 .gate_clks = peri_gate_clks,
[all …]
A Dclk-exynos850.c570 .gate_clks = top_gate_clks,
708 .gate_clks = apm_gate_clks,
991 .gate_clks = aud_gate_clks,
1094 .gate_clks = cmgp_gate_clks,
1296 .gate_clks = cpucl0_gate_clks,
1559 .gate_clks = g3d_gate_clks,
1661 .gate_clks = hsi_gate_clks,
1793 .gate_clks = is_gate_clks,
2083 .gate_clks = peri_gate_clks,
2198 .gate_clks = core_gate_clks,
[all …]
A Dclk-exynos5-subcmu.c66 exynos5_subcmu_defer_gate(ctx, (*_cmu)->gate_clks, in exynos5_subcmus_init()
110 samsung_clk_register_gate(ctx, info->gate_clks, info->nr_gate_clks); in exynos5_subcmu_probe()
A Dclk-exynos5-subcmu.h16 const struct samsung_gate_clock *gate_clks; member
A Dclk-exynos7885.c350 .gate_clks = top_gate_clks,
569 .gate_clks = peri_gate_clks,
678 .gate_clks = core_gate_clks,
803 .gate_clks = fsys_gate_clks,
A Dclk-fsd.c301 .gate_clks = cmu_gate_clks,
664 .gate_clks = peric_gate_clks,
963 .gate_clks = fsys0_gate_clks,
1135 .gate_clks = fsys1_gate_clks,
1414 .gate_clks = imem_gate_clks,
1539 .gate_clks = mfc_gate_clks,
1743 .gate_clks = cam_csi_gate_clks,
A Dclk-exynos5433.c818 .gate_clks = top_gate_clks,
901 .gate_clks = cpif_gate_clks,
1553 .gate_clks = mif_gate_clks,
2358 .gate_clks = fsys_gate_clks,
2483 .gate_clks = g2d_gate_clks,
2907 .gate_clks = disp_gate_clks,
3079 .gate_clks = aud_gate_clks,
3364 .gate_clks = g3d_gate_clks,
3507 .gate_clks = gscl_gate_clks,
4242 .gate_clks = mfc_gate_clks,
[all …]
A Dclk-exynos3250.c434 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
809 .gate_clks = gate_clks,
810 .nr_gate_clks = ARRAY_SIZE(gate_clks),
1073 .gate_clks = isp_gate_clks,
A Dclk.c343 if (cmu->gate_clks) in samsung_cmu_register_clocks()
344 samsung_clk_register_gate(ctx, cmu->gate_clks, in samsung_cmu_register_clocks()
A Dclk-s5pv210.c546 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
778 samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks)); in __s5pv210_clk_init()
A Dclk-exynos5420.c1332 .gate_clks = exynos5x_disp_gate_clks,
1342 .gate_clks = exynos5x_gsc_gate_clks,
1350 .gate_clks = exynos5x_g3d_gate_clks,
1360 .gate_clks = exynos5x_mfc_gate_clks,
1370 .gate_clks = exynos5x_mscl_gate_clks,
1378 .gate_clks = exynos5800_mau_gate_clks,
A Dclk-gs101.c1439 .gate_clks = cmu_top_gate_clks,
1916 .gate_clks = apm_gate_clks,
2379 .gate_clks = hsi0_gate_clks,
2869 .gate_clks = hsi2_gate_clks,
3429 .gate_clks = misc_gate_clks,
4026 .gate_clks = peric0_gate_clks,
4374 .gate_clks = peric1_gate_clks,
A Dclk-exynos5410.c264 .gate_clks = exynos5410_gate_clks,
A Dclk.h349 const struct samsung_gate_clock *gate_clks; member
A Dclk-exynos5250.c680 .gate_clks = exynos5250_disp_gate_clks,
/linux/drivers/clk/sophgo/
A Dclk-sg2042-rpgate.c194 const struct sg2042_rpgate_clock gate_clks[], in sg2042_clk_register_rpgates() argument
202 gate = &gate_clks[i]; in sg2042_clk_register_rpgates()
A Dclk-sg2042-clkgen.c849 const struct sg2042_gate_clock gate_clks[], in sg2042_clk_register_gates() argument
857 gate = &gate_clks[i]; in sg2042_clk_register_gates()
894 const struct sg2042_gate_clock gate_clks[], in sg2042_clk_register_gates_fw() argument
902 gate = &gate_clks[i]; in sg2042_clk_register_gates_fw()
/linux/drivers/clk/tegra/
A Dclk-tegra-periph.c772 static struct tegra_periph_init_data gate_clks[] = { variable
894 for (i = 0; i < ARRAY_SIZE(gate_clks); i++) { in gate_clk_init()
897 data = gate_clks + i; in gate_clk_init()

Completed in 78 milliseconds