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Searched refs:gb_addr_config_fields (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_plane.c216 adev->gfx.config.gb_addr_config_fields.num_pipes; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
218 adev->gfx.config.gb_addr_config_fields.num_banks; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
220 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
222 adev->gfx.config.gb_addr_config_fields.num_se; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
224 adev->gfx.config.gb_addr_config_fields.max_compress_frags; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
226 adev->gfx.config.gb_addr_config_fields.num_rb_per_se; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
450 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in amdgpu_dm_plane_add_gfx9_modifiers()
452 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in amdgpu_dm_plane_add_gfx9_modifiers()
453 int rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in amdgpu_dm_plane_add_gfx9_modifiers()
454 ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se); in amdgpu_dm_plane_add_gfx9_modifiers()
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_display.c757 num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs; in convert_tiling_flags_to_modifier()
758 num_pipes = adev->gfx.config.gb_addr_config_fields.num_pipes; in convert_tiling_flags_to_modifier()
836 packers = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs); in convert_tiling_flags_to_modifier()
841 ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs)); in convert_tiling_flags_to_modifier()
847 rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in convert_tiling_flags_to_modifier()
848 ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se); in convert_tiling_flags_to_modifier()
850 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in convert_tiling_flags_to_modifier()
852 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in convert_tiling_flags_to_modifier()
A Damdgpu_gfx.h220 struct gb_addr_config gb_addr_config_fields; member
A Dgfx_v9_4_3.c946 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v9_4_3_gpu_early_init()
953 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v9_4_3_gpu_early_init()
955 adev->gfx.config.gb_addr_config_fields.num_banks = 1 << in gfx_v9_4_3_gpu_early_init()
960 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v9_4_3_gpu_early_init()
965 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v9_4_3_gpu_early_init()
970 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_4_3_gpu_early_init()
975 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v9_4_3_gpu_early_init()
A Dgfx_v12_0.c3453 adev->gfx.config.gb_addr_config_fields.num_pkrs = in get_gb_addr_config()
3458 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in get_gb_addr_config()
3463 adev->gfx.config.gb_addr_config_fields.num_pipes; in get_gb_addr_config()
3465 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in get_gb_addr_config()
3468 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in get_gb_addr_config()
3471 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
3474 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in get_gb_addr_config()
A Dgfx_v11_0.c4530 adev->gfx.config.gb_addr_config_fields.num_pkrs = in get_gb_addr_config()
4535 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in get_gb_addr_config()
4540 adev->gfx.config.gb_addr_config_fields.num_pipes; in get_gb_addr_config()
4542 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in get_gb_addr_config()
4545 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in get_gb_addr_config()
4548 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
4551 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in get_gb_addr_config()
A Dgfx_v9_0.c2103 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v9_0_gpu_early_init()
2110 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v9_0_gpu_early_init()
2112 adev->gfx.config.gb_addr_config_fields.num_banks = 1 << in gfx_v9_0_gpu_early_init()
2117 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v9_0_gpu_early_init()
2122 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v9_0_gpu_early_init()
2127 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()
2132 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v9_0_gpu_early_init()
A Dgfx_v10_0.c4543 adev->gfx.config.gb_addr_config_fields.num_pkrs = in gfx_v10_0_gpu_early_init()
4562 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v10_0_gpu_early_init()
4567 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v10_0_gpu_early_init()
4569 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v10_0_gpu_early_init()
4572 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v10_0_gpu_early_init()
4575 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()
4578 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v10_0_gpu_early_init()

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