| /linux/drivers/gpu/drm/msm/adreno/ |
| A D | a6xx_gmu.c | 113 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_set_freq() local
128 gmu->freq = gmu->gpu_freqs[perf_index]; in a6xx_gmu_set_freq()
173 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_get_freq() local
1016 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_resume() local
1578 free_irq(gmu->gmu_irq, gmu); in a6xx_gmu_remove()
1579 free_irq(gmu->hfi_irq, gmu); in a6xx_gmu_remove()
1708 ret = a6xx_gmu_memory_alloc(gmu, &gmu->dummy, gmu->dummy.size, in a6xx_gmu_init()
1771 gmu->rscc = gmu->mmio + 0x23000; in a6xx_gmu_init()
1795 gmu->qmp = qmp_get(gmu->dev); in a6xx_gmu_init()
1834 free_irq(gmu->gmu_irq, gmu); in a6xx_gmu_init()
[all …]
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| A D | a6xx_gmu.h | 106 return readl(gmu->mmio + (offset << 2)); in gmu_read()
111 writel(value, gmu->mmio + (offset << 2)); in gmu_write()
123 u32 val = gmu_read(gmu, reg); in gmu_rmw()
127 gmu_write(gmu, reg, val | or); in gmu_rmw()
134 val = (u64) readl(gmu->mmio + (lo << 2)); in gmu_read64()
146 return readl(gmu->rscc + (offset << 2)); in gmu_read_rscc()
151 writel(value, gmu->rscc + (offset << 2)); in gmu_write_rscc()
191 void a6xx_hfi_init(struct a6xx_gmu *gmu);
193 void a6xx_hfi_stop(struct a6xx_gmu *gmu);
197 bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu);
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| A D | a6xx_hfi.c | 59 if (!gmu->legacy) in a6xx_hfi_queue_read()
90 if (!gmu->legacy) { in a6xx_hfi_queue_write()
114 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
133 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
149 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
156 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
634 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_send_bw_table()
730 ret = a6xx_hfi_send_bw_table(gmu); in a6xx_hfi_start_v1()
738 a6xx_hfi_send_test(gmu); in a6xx_hfi_start_v1()
747 if (gmu->legacy) in a6xx_hfi_start()
[all …]
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| A D | a6xx_gpu.c | 412 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local
865 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in hw_init() local
894 a6xx_sptprac_enable(gmu); in hw_init()
1196 if (a6xx_gpu->gmu.legacy) { in hw_init()
1228 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_recover() local
1271 dev_pm_genpd_add_notifier(gmu->cxpd, &gmu->pd_nb); in a6xx_recover()
1844 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_pm_resume() local
1873 a6xx_sptprac_enable(gmu); in a6xx_pm_resume()
1878 pm_runtime_put(gmu->gxpd); in a6xx_pm_resume()
1879 pm_runtime_put(gmu->dev); in a6xx_pm_resume()
[all …]
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| A D | a6xx_gpu.h | 37 struct a6xx_gmu gmu; member
100 int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);
102 bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
104 int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
105 void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
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| A D | a6xx_gpu_state.c | 155 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
1181 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
1201 val = gmu_read_rscc(gmu, offset); in _a6xx_get_gmu_registers()
1203 val = gmu_read(gmu, offset); in _a6xx_get_gmu_registers()
1230 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_get_gmu_registers()
1268 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history() local
1273 for (i = 0; i < ARRAY_SIZE(gmu->queues); i++) { in a6xx_snapshot_gmu_hfi_history()
1274 struct a6xx_hfi_queue *queue = &gmu->queues[i]; in a6xx_snapshot_gmu_hfi_history()
1577 a6xx_state->gmu_log = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.log); in a6xx_gpu_state_get()
1578 a6xx_state->gmu_hfi = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.hfi); in a6xx_gpu_state_get()
[all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| A D | gmu.yaml | 55 - const: gmu
105 - const: gmu
116 - const: gmu
137 - const: gmu
151 - const: gmu
174 - const: gmu
194 - const: gmu
218 - const: gmu
241 - const: gmu
295 gmu: gmu@506a000 {
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| A D | gpu.yaml | 130 qcom,gmu:
206 - const: gmu
328 qcom,gmu = <&gmu>;
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| /linux/arch/arm64/boot/dts/qcom/ |
| A D | msm8992.dtsi | 31 gmu-sram@0 {
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| A D | sm6350.dtsi | 1362 qcom,gmu = <&gmu>;
1446 gmu: gmu@3d6a000 { label
1447 compatible = "qcom,adreno-gmu-619.0", "qcom,adreno-gmu";
1451 reg-names = "gmu",
1458 "gmu";
1466 "gmu",
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| A D | sc8180x.dtsi | 2277 qcom,gmu = <&gmu>;
2322 gmu: gmu@2c6a000 { label
2323 compatible = "qcom,adreno-gmu-680.1", "qcom,adreno-gmu";
2328 reg-names = "gmu",
2334 interrupt-names = "hfi", "gmu";
2341 clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
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| A D | sm8350.dtsi | 1909 qcom,gmu = <&gmu>;
1974 gmu: gmu@3d6a000 { label
1975 compatible = "qcom,adreno-gmu-660.1", "qcom,adreno-gmu";
1980 reg-names = "gmu", "rscc", "gmu_pdc";
1984 interrupt-names = "hfi", "gmu";
1993 clock-names = "gmu",
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| A D | qcm2290.dtsi | 1451 "gmu",
1462 qcom,gmu = <&gmu_wrapper>;
1531 gmu_wrapper: gmu@596a000 {
1532 compatible = "qcom,adreno-gmu-wrapper";
1534 reg-names = "gmu";
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| A D | sc7180.dtsi | 2174 qcom,gmu = <&gmu>;
2268 gmu: gmu@506a000 { label
2269 compatible = "qcom,adreno-gmu-618.0", "qcom,adreno-gmu";
2272 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
2275 interrupt-names = "hfi", "gmu";
2280 clock-names = "gmu", "cxo", "axi", "memnoc";
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| A D | sm8150-mtp.dts | 353 &gmu {
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| A D | sm8250-hdk.dts | 368 &gmu {
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| A D | sm8450.dtsi | 2179 qcom,gmu = <&gmu>;
2253 gmu: gmu@3d6a000 { label
2254 compatible = "qcom,adreno-gmu-730.1", "qcom,adreno-gmu";
2258 reg-names = "gmu", "rscc", "gmu_pdc";
2262 interrupt-names = "hfi", "gmu";
2272 "gmu",
2354 clock-names = "gmu",
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| A D | sm8150.dtsi | 2253 qcom,gmu = <&gmu>;
2306 gmu: gmu@2c6a000 { label
2307 compatible = "qcom,adreno-gmu-640.1", "qcom,adreno-gmu";
2312 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
2316 interrupt-names = "hfi", "gmu";
2323 clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
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| A D | sdm845-xiaomi-beryllium-common.dtsi | 242 &gmu {
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| A D | sm6115.dtsi | 1705 "gmu",
1713 qcom,gmu = <&gmu_wrapper>;
1779 gmu_wrapper: gmu@596a000 {
1780 compatible = "qcom,adreno-gmu-wrapper";
1782 reg-names = "gmu";
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| A D | sdm845.dtsi | 4848 qcom,gmu = <&gmu>;
4925 gmu: gmu@506a000 { label
4926 compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
4931 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
4935 interrupt-names = "hfi", "gmu";
4941 clock-names = "gmu", "cxo", "axi", "memnoc";
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| A D | x1e80100.dtsi | 538 pld_gmu_mem: pld-gmu@81f36000 {
3322 qcom,gmu = <&gmu>;
3393 gmu: gmu@3d6a000 { label
3394 compatible = "qcom,adreno-gmu-x185.1", "qcom,adreno-gmu";
3398 reg-names = "gmu", "rscc", "gmu_pdc";
3402 interrupt-names = "hfi", "gmu";
3412 "gmu",
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| A D | sc8280xp.dtsi | 2452 qcom,gmu = <&gmu>;
2512 gmu: gmu@3d6a000 { label
2513 compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";
2517 reg-names = "gmu", "rscc", "gmu_pdc";
2520 interrupt-names = "hfi", "gmu";
2528 clock-names = "gmu",
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| A D | sm8650.dtsi | 2636 qcom,gmu = <&gmu>;
2706 gmu: gmu@3d6a000 { label
2707 compatible = "qcom,adreno-gmu-750.1", "qcom,adreno-gmu";
2711 reg-names = "gmu", "rscc", "gmu_pdc";
2715 interrupt-names = "hfi", "gmu";
2725 "gmu",
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| /linux/Documentation/devicetree/bindings/sram/ |
| A D | qcom,ocmem.yaml | 120 gmu-sram@0 {
|