Home
last modified time | relevance | path

Searched refs:gtpu_dw_2 (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/
A Ddr_ste.c980 spec->gtpu_dw_2 = IFC_GET_CLR(fte_match_set_misc3, mask, gtpu_dw_2, clr); in dr_ste_copy_mask_misc3()
A Ddr_ste_v0.c1840 DR_STE_SET_FLEX_PARSER_FIELD(tag, gtpu_dw_2, sb->caps, &value->misc3); in dr_ste_v0_build_tnl_gtpu_flex_parser_0_tag()
1867 DR_STE_SET_FLEX_PARSER_FIELD(tag, gtpu_dw_2, sb->caps, &value->misc3); in dr_ste_v0_build_tnl_gtpu_flex_parser_1_tag()
A Ddr_matcher.c213 return mask->misc3.gtpu_dw_2 && in dr_mask_is_tnl_gtpu_dw_2()
A Ddr_ste_v1.c2188 DR_STE_SET_FLEX_PARSER_FIELD(tag, gtpu_dw_2, sb->caps, &value->misc3); in dr_ste_v1_build_tnl_gtpu_flex_parser_0_tag()
2215 DR_STE_SET_FLEX_PARSER_FIELD(tag, gtpu_dw_2, sb->caps, &value->misc3); in dr_ste_v1_build_tnl_gtpu_flex_parser_1_tag()
A Ddr_types.h782 u32 gtpu_dw_2; member
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/
A Dmlx5hws_definer.c1280 if (HWS_IS_FLD_SET(match_param, misc_parameters_3.gtpu_dw_2)) { in hws_definer_conv_misc3()
1292 HWS_CALC_HDR_SRC(fc, misc_parameters_3.gtpu_dw_2); in hws_definer_conv_misc3()
/linux/include/linux/mlx5/
A Dmlx5_ifc.h733 u8 gtpu_dw_2[0x20]; member

Completed in 98 milliseconds