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/linux/lib/zlib_inflate/
A Dinffast.c109 hold = state->hold; in inflate_fast()
120 hold += (unsigned long)(*in++) << bits; in inflate_fast()
122 hold += (unsigned long)(*in++) << bits; in inflate_fast()
125 this = lcode[hold & lmask]; in inflate_fast()
128 hold >>= op; in inflate_fast()
143 hold >>= op; in inflate_fast()
152 this = dcode[hold & dmask]; in inflate_fast()
155 hold >>= op; in inflate_fast()
177 hold >>= op; in inflate_fast()
314 hold &= (1U << bits) - 1; in inflate_fast()
[all …]
A Dinflate.c46 state->hold = 0; in zlib_inflateReset()
191 hold = state->hold; \
202 state->hold = hold; \
209 hold = 0; \
219 hold += (unsigned long)(*next++) << bits; \
233 ((unsigned)hold & ((1U << (n)) - 1))
238 hold >>= (n); \
245 hold >>= bits & 7; \
337 unsigned long hold; /* bit buffer */ in zlib_inflate() local
441 if ((hold & 0xffff) != ((hold >> 16) ^ 0xffff)) { in zlib_inflate()
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/linux/include/trace/events/
A Dpage_pool.h17 s32 inflight, u32 hold, u32 release),
19 TP_ARGS(pool, inflight, hold, release),
24 __field(u32, hold)
32 __entry->hold = hold;
38 __entry->pool, __entry->inflight, __entry->hold,
71 netmem_ref netmem, u32 hold),
73 TP_ARGS(pool, netmem, hold),
78 __field(u32, hold)
85 __entry->hold = hold;
91 __entry->netmem & NET_IOV, __entry->pfn, __entry->hold)
/linux/drivers/mtd/nand/raw/
A Dtxx9ndfmc.c70 unsigned char hold; /* in gbusclock */ member
242 txx9ndfmc_write(dev, (drvdata->hold << 4) | drvdata->spw, TXX9_NDFSPR); in txx9ndfmc_initialize()
282 int hold, spw; in txx9ndfmc_probe() local
294 hold = plat->hold ?: 20; /* tDH */ in txx9ndfmc_probe()
297 hold = TXX9NDFMC_NS_TO_CYC(gbusclk, hold); in txx9ndfmc_probe()
300 hold -= 2; /* actual hold time : (HOLD + 2) BUSCLK */ in txx9ndfmc_probe()
302 hold = clamp(hold, 1, 15); in txx9ndfmc_probe()
303 drvdata->hold = hold; in txx9ndfmc_probe()
307 (gbusclk + 500000) / 1000000, hold, spw); in txx9ndfmc_probe()
/linux/Documentation/devicetree/bindings/sound/
A Dmaxim,max98504.yaml44 Brownout attenuation to the speaker gain applied during the "attack hold"
45 and "timed hold" phase, the value must be from 0...6 (dB) range.
47 maxim,brownout-attack-hold-ms:
51 Brownout attack hold phase time in ms, VBATBROWN_ATTK_HOLD, register 0x0018.
53 maxim,brownout-timed-hold-ms:
57 Brownout timed hold phase time in ms, VBATBROWN_TIME_HOLD, register 0x0019.
/linux/arch/arc/boot/dts/
A Dabilis_tb100_dvk.dts37 i2c-sda-hold-time-ns = <432>;
40 i2c-sda-hold-time-ns = <432>;
43 i2c-sda-hold-time-ns = <432>;
46 i2c-sda-hold-time-ns = <432>;
49 i2c-sda-hold-time-ns = <432>;
A Dabilis_tb101_dvk.dts37 i2c-sda-hold-time-ns = <432>;
40 i2c-sda-hold-time-ns = <432>;
43 i2c-sda-hold-time-ns = <432>;
46 i2c-sda-hold-time-ns = <432>;
49 i2c-sda-hold-time-ns = <432>;
/linux/include/net/caif/
A Dcfsrvl.h23 void (*hold)(struct cflayer *lyr); member
48 if (layr == NULL || layr->up == NULL || s->hold == NULL) in cfsrvl_get()
51 s->hold(layr->up); in cfsrvl_get()
57 if (layr == NULL || layr->up == NULL || s->hold == NULL) in cfsrvl_put()
/linux/Documentation/leds/
A Dleds-qcom-lpg.rst35 The pattern is a series of brightness and hold-time pairs, with the hold-time
36 expressed in milliseconds. The hold time is a property of the pattern and must
54 The LPG supports specifying a longer hold-time for the first and last element
69 Similarly, the last entry can be stretched by using a higher hold-time on the
77 specified hold-time of the middle item in the pattern is allowed to have a
78 different hold-time.
/linux/Documentation/usb/
A Dgadget_hid.rst204 if (strcmp(tok, "--hold") == 0) {
205 *hold = 1;
256 if (strcmp(tok, "--hold") == 0) {
257 *hold = 1;
303 *hold = 1;
342 " --hold\n");
352 " --hold\n");
376 int hold = 0;
428 hold = 0;
434 to_send = mouse_fill_report(report, buf, &hold);
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/linux/scripts/coccinelle/free/
A Difnulldev_put.cocci3 /// NULL check before dev_{put, hold} functions is not needed.
48 cocci.print_main("NULL check before dev_{put, hold} functions is not needed", p)
54 msg = "WARNING: NULL check before dev_{put, hold} functions is not needed."
/linux/Documentation/devicetree/bindings/memory-controllers/
A Dst,stm32-fmc2-ebi-props.yaml92 st,fmc2-ebi-cs-address-hold-ns:
93 description: This property defines the duration of the address hold
105 st,fmc2-ebi-cs-data-hold-ns:
106 description: This property defines the duration of the data hold phase
121 st,fmc2-ebi-cs-write-address-hold-ns:
122 description: This property defines the duration of the address hold
134 st,fmc2-ebi-cs-write-data-hold-ns:
135 description: This property defines the duration of the data hold phase
A Dti-aemif.txt112 - ti,cs-read-hold-ns: read hold width, ns
129 - ti,cs-write-hold-ns: write hold width, ns
166 ti,cs-read-hold-ns = <7>;
169 ti,cs-write-hold-ns = <7>;
195 ti,cs-read-hold-ns = <8>;
198 ti,cs-write-hold-ns = <7>;
/linux/Documentation/hwmon/
A Dabituguru-datasheet.rst40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and
41 later on attached again data-port will hold 0x08, more about this later.
44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also
46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read
88 to hold 0x09, DATA should read 0x09 within 250 read cycles.
90 Next CMD _must_ be read and should hold 0xAC, usually CMD will hold 0xAC the
107 wait for to DATA to hold 0x08 again indicating that it wants / is ready for
117 Then for each byte of data you want to read wait for DATA to hold 0x01
136 Then for each byte of data you want to write wait for DATA to hold 0x00
140 Once all bytes have been written wait for DATA to hold 0x01 (max 250 reads)
[all …]
A Dda9055.rst17 resolution and track and hold circuitry combined with an analogue input
19 different inputs. The track and hold circuit ensures stable input voltages at
/linux/Documentation/devicetree/bindings/i2c/
A Dsnps,designware-i2c.yaml46 ICPU_CFG:TWI_DELAY registers to setup the SDA hold time.
72 i2c-sda-hold-time-ns:
74 The property should contain the SDA hold time in nanoseconds. This option
121 i2c-sda-hold-time-ns = <300>;
A Datmel,at91sam-i2c.yaml86 i2c-sda-hold-time-ns:
88 TWD hold time
130 i2c-sda-hold-time-ns = <336>;
A Dhisilicon,ascend910-i2c.yaml41 i2c-sda-hold-time-ns:
67 i2c-sda-hold-time-ns = <56>;
/linux/drivers/i2c/busses/
A Di2c-at91-master.c68 int ckdiv, cdiv, div, hold = 0, filter_width = 0; in at91_calc_twi_clock() local
94 hold = DIV_ROUND_UP(t->sda_hold_ns in at91_calc_twi_clock()
96 hold -= 3; in at91_calc_twi_clock()
97 if (hold < 0) in at91_calc_twi_clock()
98 hold = 0; in at91_calc_twi_clock()
99 if (hold > AT91_TWI_CWGR_HOLD_MAX) { in at91_calc_twi_clock()
102 AT91_TWI_CWGR_HOLD_MAX, hold); in at91_calc_twi_clock()
103 hold = AT91_TWI_CWGR_HOLD_MAX; in at91_calc_twi_clock()
123 | AT91_TWI_CWGR_HOLD(hold); in at91_calc_twi_clock()
128 cdiv, ckdiv, hold, t->sda_hold_ns, filter_width, in at91_calc_twi_clock()
/linux/Documentation/devicetree/bindings/power/reset/
A Dqcom,pshold.yaml13 A power supply hold (ps-hold) bit is set to power the Qualcomm chipsets.
/linux/arch/mips/bcm63xx/
A Dcs.c67 unsigned int setup, unsigned int hold) in bcm63xx_set_cs_timing() argument
82 val |= hold << MPI_CSCTL_HOLD_SHIFT; in bcm63xx_set_cs_timing()
/linux/arch/arm/mach-omap2/
A Domap-headsmp.S82 hold: ldr r12,=0x103 label
89 bne hold
/linux/Documentation/devicetree/bindings/bus/
A Dqcom,ebi2.yaml124 qcom,xmem-write-hold-cycles:
129 asserted. With a hold of 1 (value = 0), the CS stays active
166 qcom,xmem-address-hold-enable:
169 Holds the address for an extra cycle to meet hold time
181 qcom,xmem-read-hold-cycles:
233 qcom,xmem-write-hold-cycles = <3>;
/linux/net/caif/
A Dcfsrvl.c209 void (*hold)(struct cflayer *lyr), in caif_client_register_refcnt()
217 service->hold = hold; in caif_client_register_refcnt()
/linux/Documentation/devicetree/bindings/mtd/
A Dlpc32xx-slc.txt16 - nxp,whold: Write hold time (W_HOLD)
19 - nxp,rhold: Read hold time (R_HOLD)

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