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Searched refs:hsync_end (Results 1 – 25 of 210) sorted by relevance

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/linux/drivers/gpu/drm/panel/
A Dpanel-simple.c792 .hsync_end = 480 + 2 + 41,
816 .hsync_end = 800 + 0 + 255,
1381 .hsync_end = 1280 + 0 + 2,
1509 .hsync_end = 480 + 5 + 5,
1902 .hsync_end = 480 + 8 + 4,
1932 .hsync_end = 480 + 2 + 41,
2076 .hsync_end = 640 + 16,
2268 .hsync_end = 480 + 5 + 1,
3171 .hsync_end = 800 + 1,
3563 .hsync_end = 896,
[all …]
A Dpanel-edp.c1019 .hsync_end = 1366 + 40 + 40,
1032 .hsync_end = 1366 + 48 + 32,
1087 .hsync_end = 1366 + 48 + 32,
1194 .hsync_end = 1920 + 48 + 32,
1326 .hsync_end = 1920 + 40 + 40,
1348 .hsync_end = 2160 + 48 + 32,
1375 .hsync_end = 1366 + 40 + 32,
1401 .hsync_end = 1536 + 12 + 16,
1423 .hsync_end = 2048 + 150 + 5,
1444 .hsync_end = 1920 + 40 + 40,
[all …]
A Dpanel-arm-versatile.c140 .hsync_end = 320 + 6 + 6,
163 .hsync_end = 640 + 24 + 96,
185 .hsync_end = 176 + 2 + 3,
208 .hsync_end = 240 + 10 + 10,
A Dpanel-tpo-tpg110.c108 .hsync_end = 800 + 40 + 1,
124 .hsync_end = 640 + 24 + 1,
140 .hsync_end = 480 + 2 + 1,
156 .hsync_end = 480 + 2 + 1,
172 .hsync_end = 400 + 20 + 1,
A Dpanel-ilitek-ili9322.c540 .hsync_end = 320 + 359 + 1,
553 .hsync_end = 360 + 35 + 1,
567 .hsync_end = 320 + 38 + 1,
581 .hsync_end = 640 + 252 + 1,
594 .hsync_end = 720 + 252 + 1,
608 .hsync_end = 640 + 3 + 1,
622 .hsync_end = 720 + 3 + 1,
A Dpanel-newvision-nv3052c.c832 .hsync_end = 640 + 96 + 16,
844 .hsync_end = 640 + 39 + 2,
859 .hsync_end = 640 + 34 + 4,
874 .hsync_end = 640 + 64 + 20,
A Dpanel-sitronix-st7703.c137 .hsync_end = 720 + 90 + 20,
316 .hsync_end = 720 + 40 + 40,
403 .hsync_end = 640 + 40 + 2,
487 .hsync_end = 720 + 45 + 4,
573 .hsync_end = 720 + 40 + 10,
655 .hsync_end = 640 + 40 + 2,
A Dpanel-novatek-nt35560.c64 .hsync_end = 480 + 15 + 0,
83 .hsync_end = 480 + 154 + 16,
106 .hsync_end = 480 + 15 + 0,
125 .hsync_end = 480 + 154 + 16,
A Dpanel-newvision-nv3051d.c445 .hsync_end = 640 + 40 + 2,
457 .hsync_end = 640 + 40 + 2,
469 .hsync_end = 640 + 40 + 2,
484 .hsync_end = 640 + 40 + 2,
A Dpanel-innolux-ej030na.c260 .hsync_end = 320 + 10 + 37,
272 .hsync_end = 320 + 10 + 37,
A Dpanel-leadtek-ltk050h3146w.c312 .hsync_end = 720 + 12 + 6,
403 .hsync_end = 720 + 42 + 8,
499 .hsync_end = 720 + 42 + 10,
A Dpanel-orisetech-ota5601a.c306 .hsync_end = 640 + 220 + 20,
319 .hsync_end = 640 + 280 + 20,
A Dpanel-auo-a030jtn01.c252 .hsync_end = 320 + 8 + 42,
264 .hsync_end = 320 + 8 + 42,
A Dpanel-leadtek-ltk500hd1829.c220 .hsync_end = 800 + 18 + 18,
465 .hsync_end = 720 + 50 + 50,
/linux/drivers/gpu/drm/gud/
A Dgud_internal.h138 dst->hsync_end = cpu_to_le16(src->hsync_end); in gud_from_display_mode()
156 dst->hsync_end = le16_to_cpu(src->hsync_end); in gud_to_display_mode()
/linux/drivers/gpu/drm/i915/display/
A Dintel_tv.c321 u8 hsync_end; member
395 .hsync_end = 64, .hblank_end = 124,
437 .hsync_end = 64, .hblank_end = 124,
480 .hsync_end = 64, .hblank_end = 124,
523 .hsync_end = 64, .hblank_end = 124,
566 .hsync_end = 64, .hblank_end = 128,
611 .hsync_end = 64, .hblank_end = 142,
1012 mode->hsync_end = mode->hsync_start + in intel_tv_mode_to_mode()
1013 tv_mode->hsync_end; in intel_tv_mode_to_mode()
1061 int hsync_end = mode->hsync_end - mode->hdisplay + right_margin; in intel_tv_scale_mode_horiz() local
[all …]
/linux/drivers/gpu/drm/
A Ddrm_modes.c458 mode->hsync_end = mode->hsync_start + hslen; in fill_analog_mode()
459 mode->htotal = mode->hsync_end + hbp; in fill_analog_mode()
762 drm_mode->hsync_start = drm_mode->hsync_end - in drm_cvt_mode()
1077 dmode->htotal = dmode->hsync_end + vm->hback_porch; in drm_display_mode_from_videomode()
1118 vm->hback_porch = dmode->htotal - dmode->hsync_end; in drm_display_mode_to_videomode()
1354 p->crtc_hsync_end = p->hsync_end; in drm_mode_set_crtcinfo()
1475 mode1->hsync_end == mode2->hsync_end && in drm_mode_match_timings()
1643 mode->hsync_end < mode->hsync_start || in drm_mode_validate_basic()
1644 mode->htotal < mode->hsync_end) in drm_mode_validate_basic()
2586 out->hsync_end = in->hsync_end; in drm_mode_convert_to_umode()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
A Ddcss-ss.c124 u16 hsync_start, hsync_end; in dcss_ss_sync_set() local
138 hsync_end = vm->hsync_len - 1; in dcss_ss_sync_set()
141 ((u32)hsync_end << SYNC_END_POS) | hsync_start, in dcss_ss_sync_set()
/linux/include/drm/
A Ddrm_modes.h136 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
151 .hdisplay = (hd), .hsync_start = (hd), .hsync_end = (hd), \
261 u16 hsync_end; member
433 (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \
/linux/drivers/gpu/drm/msm/dp/
A Ddp_panel.c347 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, in dp_panel_timing_cfg()
349 drm_mode->hsync_end - drm_mode->hsync_start); in dp_panel_timing_cfg()
375 data |= drm_mode->hsync_end - drm_mode->hsync_start; in dp_panel_timing_cfg()
414 drm_mode->htotal - drm_mode->hsync_end, in dp_panel_init_panel_info()
416 drm_mode->hsync_end - drm_mode->hsync_start); in dp_panel_init_panel_info()
A Ddp_debug.c49 drm_mode->htotal - drm_mode->hsync_end, in dp_debug_show()
55 drm_mode->hsync_end - drm_mode->hsync_start, in dp_debug_show()
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_encoder_phys_vid.c50 if ((mode->htotal < mode->hsync_end) in drm_mode_to_intf_timing_params()
54 || (mode->hsync_end < mode->hsync_start) in drm_mode_to_intf_timing_params()
58 mode->hsync_start, mode->hsync_end, in drm_mode_to_intf_timing_params()
79 timing->h_back_porch = mode->htotal - mode->hsync_end; in drm_mode_to_intf_timing_params()
83 timing->hsync_pulse_width = mode->hsync_end - mode->hsync_start; in drm_mode_to_intf_timing_params()
282 mode.hsync_end >>= 1; in dpu_encoder_phys_vid_setup_timing_engine()
289 mode.hsync_start, mode.hsync_end, in dpu_encoder_phys_vid_setup_timing_engine()
/linux/drivers/media/platform/xilinx/
A Dxilinx-vtc.h24 unsigned int hsync_end; member
/linux/drivers/gpu/drm/bridge/adv7511/
A Dadv7533.c34 hsw = mode->hsync_end - mode->hsync_start; in adv7511_dsi_config_timing_gen()
36 hbp = mode->htotal - mode->hsync_end; in adv7511_dsi_config_timing_gen()
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_encoders.c173 unsigned int hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()
184 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in amdgpu_panel_mode_fixup()

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