Home
last modified time | relevance | path

Searched refs:i915 (Results 1 – 25 of 496) sorted by relevance

12345678910>>...20

/linux/drivers/gpu/drm/i915/
A Di915_drv.h393 #define INTEL_INFO(i915) ((i915)->__info) argument
394 #define RUNTIME_INFO(i915) (&(i915)->__runtime) argument
395 #define DRIVER_CAPS(i915) (&(i915)->caps) argument
503 #define IS_G4X(i915) (IS_G45(i915) || IS_GM45(i915)) argument
540 #define IS_LUNARLAKE(i915) (0 && i915) argument
541 #define IS_BATTLEMAGE(i915) (0 && i915) argument
621 #define IS_GEN9_LP(i915) (GRAPHICS_VER(i915) == 9 && IS_LP(i915)) argument
622 #define IS_GEN9_BC(i915) (GRAPHICS_VER(i915) == 9 && !IS_LP(i915)) argument
659 #define HAS_WT(i915) HAS_EDRAM(i915) argument
692 !(IS_I915G(i915) || IS_I915GM(i915)))
[all …]
A Dintel_clock_gating.c48 if (HAS_LLC(i915)) { in gen9_init_clock_gating()
386 if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0)) in kbl_init_clock_gating()
391 if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0)) in kbl_init_clock_gating()
505 if (IS_IVB_GT1(i915)) in ivb_init_clock_gating()
610 if (IS_GM45(i915)) in g4x_init_clock_gating()
612 intel_uncore_write(&i915->uncore, DSPCLK_GATE_D(i915), dspclk_gate); in g4x_init_clock_gating()
651 if (IS_PINEVIEW(i915)) in gen3_init_clock_gating()
701 i915->clock_gating_funcs->init_clock_gating(i915); in intel_clock_gating_init()
748 if (IS_DG2(i915)) in intel_clock_gating_hooks_init()
750 else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) in intel_clock_gating_hooks_init()
[all …]
A Dvlv_sideband.h33 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
41 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
46 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_get()
54 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_put()
59 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_get()
67 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_put()
72 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_get()
81 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_put()
99 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC)); in vlv_nc_get()
106 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC)); in vlv_nc_put()
[all …]
A Dvlv_sideband.c45 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
53 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
54 cpu_latency_qos_update_request(&i915->sb_qos, in __vlv_punit_put()
63 __vlv_punit_get(i915); in vlv_iosf_sb_get()
65 mutex_lock(&i915->sb_lock); in vlv_iosf_sb_get()
70 mutex_unlock(&i915->sb_lock); in vlv_iosf_sb_put()
73 __vlv_punit_put(i915); in vlv_iosf_sb_put()
80 struct intel_uncore *uncore = &i915->uncore; in vlv_sideband_rw()
84 lockdep_assert_held(&i915->sb_lock); in vlv_sideband_rw()
206 if (IS_CHERRYVIEW(i915)) in vlv_dpio_phy_iosf_port()
[all …]
A Di915_getparam.c38 value = to_gt(i915)->ggtt->num_fences; in i915_getparam_ioctl()
41 value = !!i915->display.overlay; in i915_getparam_ioctl()
44 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
48 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
60 value = HAS_LLC(i915); in i915_getparam_ioctl()
63 value = HAS_WT(i915); in i915_getparam_ioctl()
66 value = INTEL_PPGTT(i915); in i915_getparam_ioctl()
89 intel_has_gpu_reset(to_gt(i915)); in i915_getparam_ioctl()
97 value = HAS_POOLED_EU(i915); in i915_getparam_ioctl()
104 if (i915->media_gt) in i915_getparam_ioctl()
[all …]
/linux/drivers/gpu/drm/i915/display/
A Dintel_display_driver.c87 if (!HAS_DISPLAY(i915)) in intel_display_driver_init_hw()
93 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
150 if (IS_I845G(i915) || IS_I865G(i915)) { in intel_mode_config_init()
153 } else if (IS_I830(i915) || IS_I85X(i915) || in intel_mode_config_init()
154 IS_I915G(i915) || IS_I915GM(i915)) { in intel_mode_config_init()
238 intel_dmc_init(i915); in intel_display_driver_probe_noirq()
273 intel_dmc_fini(i915); in intel_display_driver_probe_noirq()
427 intel_wm_init(i915); in intel_display_driver_probe_nogem()
480 if (!HAS_GMCH(i915)) in intel_display_driver_probe_nogem()
709 if (!HAS_GMCH(i915)) in __intel_display_driver_resume()
[all …]
A Dintel_display_device.h119 #define HAS_4TILE(i915) (IS_DG2(i915) || DISPLAY_VER(i915) >= 14) argument
123 #define HAS_CUR_FBC(i915) (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13)) argument
124 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915)) argument
128 #define HAS_DOUBLE_BUFFERED_M_N(i915) (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915)) argument
130 #define HAS_DP20(i915) (IS_DG2(i915) || DISPLAY_VER(i915) >= 14) argument
131 #define HAS_DPT(i915) (DISPLAY_VER(i915) >= 13) argument
139 #define HAS_GMBUS_BURST_READ(i915) (DISPLAY_VER(i915) >= 10 || IS_KABYLAKE(i915)) argument
141 #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) argument
143 #define HAS_IPS(i915) (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915)) argument
146 #define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14) argument
[all …]
A Dintel_gmbus.c211 intel_de_write(i915, GMBUS0(i915), 0); in intel_gmbus_reset()
212 intel_de_write(i915, GMBUS4(i915), 0); in intel_gmbus_reset()
239 struct drm_i915_private *i915 = bus->i915; in get_reserved() local
243 if (!IS_I830(i915) && !IS_I845G(i915)) in get_reserved()
253 struct drm_i915_private *i915 = bus->i915; in get_clock() local
265 struct drm_i915_private *i915 = bus->i915; in get_data() local
390 intel_de_write_fw(i915, GMBUS4(i915), 0); in gmbus_wait()
447 intel_de_write_fw(i915, GMBUS0(i915), in gmbus_xfer_read_chunk()
451 intel_de_write_fw(i915, GMBUS1(i915), in gmbus_xfer_read_chunk()
530 intel_de_write_fw(i915, GMBUS1(i915), in gmbus_xfer_write_chunk()
[all …]
A Dintel_dmc.c544 if ((IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915)) && in disable_dmc_evt()
676 struct drm_i915_private *i915 = dmc->i915; in dmc_set_fw_offset() local
706 struct drm_i915_private *i915 = dmc->i915; in dmc_mmio_addr_sanity_check() local
739 struct drm_i915_private *i915 = dmc->i915; in parse_dmc_fw_header() local
858 struct drm_i915_private *i915 = dmc->i915; in parse_dmc_fw_package() local
912 struct drm_i915_private *i915 = dmc->i915; in parse_dmc_fw_css() local
934 struct drm_i915_private *i915 = dmc->i915; in parse_dmc_fw() local
1010 struct drm_i915_private *i915 = dmc->i915; in dmc_load_work_fn() local
1084 dmc->i915 = i915; in intel_dmc_init()
1239 if (IS_DGFX(i915) || DISPLAY_VER(i915) >= 14) { in intel_dmc_debugfs_status_show()
[all …]
A Dintel_audio.c193 return (DISPLAY_VER(i915) == 20 || IS_BATTLEMAGE(i915)); in needs_wa_14020863754()
588 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in ibx_audio_regs_init()
688 if (HAS_DP20(i915)) in intel_audio_sdp_split_update()
884 if (IS_G4X(i915)) in intel_audio_hooks_init()
886 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915) || in intel_audio_hooks_init()
887 HAS_PCH_CPT(i915) || HAS_PCH_IBX(i915)) in intel_audio_hooks_init()
889 else if (IS_HASWELL(i915) || DISPLAY_VER(i915) >= 8) in intel_audio_hooks_init()
1062 if (drm_WARN_ON_ONCE(&i915->drm, !HAS_DDI(i915))) in i915_audio_component_get_cdclk_freq()
1128 if (!HAS_DDI(i915)) in i915_audio_component_sync_audio_rate()
1289 if ((IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) && in i915_audio_component_init()
[all …]
A Dintel_display_irq.h17 void valleyview_enable_display_irqs(struct drm_i915_private *i915);
20 void ilk_update_display_irq(struct drm_i915_private *i915,
36 u32 gen8_de_pipe_underrun_mask(struct drm_i915_private *i915);
57 void vlv_display_irq_reset(struct drm_i915_private *i915);
58 void gen8_display_irq_reset(struct drm_i915_private *i915);
59 void gen11_display_irq_reset(struct drm_i915_private *i915);
62 void ilk_de_irq_postinstall(struct drm_i915_private *i915);
63 void gen8_de_irq_postinstall(struct drm_i915_private *i915);
65 void dg1_de_irq_postinstall(struct drm_i915_private *i915);
71 void i9xx_pipestat_irq_reset(struct drm_i915_private *i915);
[all …]
A Dintel_hdcp.c337 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in hdcp_key_loadable()
375 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_hdcp_load_keys()
387 if (DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915)) { in intel_hdcp_load_keys()
841 intel_de_write(i915, HDCP_CONF(i915, cpu_transcoder, port), in intel_hdcp_auth()
873 intel_de_write(i915, HDCP_BKSVLO(i915, cpu_transcoder, port), in intel_hdcp_auth()
875 intel_de_write(i915, HDCP_BKSVHI(i915, cpu_transcoder, port), in intel_hdcp_auth()
889 intel_de_write(i915, HDCP_CONF(i915, cpu_transcoder, port), in intel_hdcp_auth()
1886 intel_de_rmw(i915, HDCP2_CTL(i915, cpu_transcoder, port), in hdcp2_enable_encryption()
1908 drm_WARN_ON(&i915->drm, !(intel_de_read(i915, HDCP2_STATUS(i915, cpu_transcoder, port)) & in hdcp2_disable_encryption()
1911 intel_de_rmw(i915, HDCP2_CTL(i915, cpu_transcoder, port), in hdcp2_disable_encryption()
[all …]
A Dintel_dpll_mgr.c204 if (IS_DG1(i915)) in intel_combo_pll_enable_reg()
206 else if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) && in intel_combo_pll_enable_reg()
1004 if (IS_HASWELL(i915) && !IS_HASWELL_ULT(i915)) { in hsw_ddi_wrpll_get_freq()
2603 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()
3715 if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) && in icl_pll_get_hw_state()
3772 if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) && in icl_dpll_write()
4310 if (DISPLAY_VER(i915) >= 14 || IS_DG2(i915)) in intel_shared_dpll_init()
4323 else if (IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) in intel_shared_dpll_init()
4327 else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) in intel_shared_dpll_init()
4333 else if (HAS_PCH_IBX(i915) || HAS_PCH_CPT(i915)) in intel_shared_dpll_init()
[all …]
A Dintel_dkl_phy.c19 spin_lock_init(&i915->display.dkl.phy_lock); in intel_dkl_phy_init()
29 intel_de_write(i915, in dkl_phy_set_hip_idx()
48 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
50 dkl_phy_set_hip_idx(i915, reg); in intel_dkl_phy_read()
53 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
69 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
71 dkl_phy_set_hip_idx(i915, reg); in intel_dkl_phy_write()
90 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_rmw()
92 dkl_phy_set_hip_idx(i915, reg); in intel_dkl_phy_rmw()
108 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_posting_read()
[all …]
A Dintel_frontbuffer.c89 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
91 spin_unlock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
99 intel_td_flush(i915); in frontbuffer_flush()
100 intel_drrs_flush(i915, frontbuffer_bits); in frontbuffer_flush()
120 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
124 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
140 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_complete()
164 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip()
180 spin_lock(&i915->display.fb_tracking.lock); in __intel_fb_invalidate()
201 spin_lock(&i915->display.fb_tracking.lock); in __intel_fb_flush()
[all …]
A Dintel_modeset_setup.c59 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic_begin()
85 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic_begin()
281 drm_WARN_ON(&i915->drm, in intel_crtc_disable_noatomic()
395 drm_dbg_kms(&i915->drm, in intel_sanitize_plane_mapping()
469 !HAS_GMCH(i915)); in intel_sanitize_fifo_underrun_reporting()
599 drm_dbg_kms(&i915->drm, in intel_sanitize_encoder()
607 drm_dbg_kms(&i915->drm, in intel_sanitize_encoder()
658 if (HAS_DDI(i915)) in intel_sanitize_encoder()
682 drm_dbg_kms(&i915->drm, in readout_plane_state()
942 if (IS_HASWELL(i915)) in intel_early_display_was()
[all …]
/linux/drivers/gpu/drm/i915/soc/
A Dintel_gmch.c51 pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo); in intel_alloc_mchbar_resource()
75 pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, in intel_alloc_mchbar_resource()
78 pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), in intel_alloc_mchbar_resource()
89 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_gmch_bar_setup()
94 if (IS_I915G(i915) || IS_I915GM(i915)) { in intel_gmch_bar_setup()
98 pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp); in intel_gmch_bar_setup()
112 if (IS_I915G(i915) || IS_I915GM(i915)) { in intel_gmch_bar_setup()
116 pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp); in intel_gmch_bar_setup()
124 if (IS_I915G(i915) || IS_I915GM(i915)) { in intel_gmch_bar_teardown()
135 pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), in intel_gmch_bar_teardown()
[all …]
A Dintel_dram.c130 i915->mem_freq = pnv_mem_freq(i915); in detect_mem_freq()
132 i915->mem_freq = ilk_mem_freq(i915); in detect_mem_freq()
134 i915->mem_freq = chv_mem_freq(i915); in detect_mem_freq()
136 i915->mem_freq = vlv_mem_freq(i915); in detect_mem_freq()
139 i915->is_ddr3 = pnv_is_ddr3(i915); in detect_mem_freq()
159 if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) { in i9xx_fsb_freq()
230 i915->fsb_freq = ilk_fsb_freq(i915); in detect_fsb_freq()
232 i915->fsb_freq = i9xx_fsb_freq(i915); in detect_fsb_freq()
687 drm_WARN_ON(&i915->drm, !IS_DGFX(i915)); in xelpdp_get_dram_info()
710 if (GRAPHICS_VER(i915) < 9 || IS_DG2(i915) || !HAS_DISPLAY(i915)) in intel_dram_detect()
[all …]
/linux/drivers/gpu/drm/i915/selftests/
A Dmock_gem_device.c63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
167 if (IS_ERR(i915)) { in mock_gem_device()
202 i915_gem_init__mm(i915); in mock_gem_device()
204 mock_uncore_init(&i915->uncore, i915); in mock_gem_device()
207 mock_gt_probe(i915); in mock_gem_device()
214 if (!i915->wq) in mock_gem_device()
218 if (!i915->unordered_wq) in mock_gem_device()
229 to_gt(i915)->vm = i915_vm_get(&to_gt(i915)->ggtt->vm); in mock_gem_device()
233 to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0); in mock_gem_device()
[all …]
A Di915_gem.c89 trash_stolen(i915); in simulate_hibernate()
96 i915_gem_suspend(i915); in igt_pm_prepare()
118 i915_gem_freeze(i915); in igt_pm_hibernate()
135 i915_gem_resume(i915); in igt_pm_resume()
146 file = mock_file(i915); in igt_gem_suspend()
161 igt_pm_suspend(i915); in igt_gem_suspend()
164 simulate_hibernate(i915); in igt_gem_suspend()
166 igt_pm_resume(i915); in igt_gem_suspend()
181 file = mock_file(i915); in igt_gem_hibernate()
196 igt_pm_hibernate(i915); in igt_gem_hibernate()
[all …]
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_stolen.c101 !IS_G33(i915) && !IS_PINEVIEW(i915) && !IS_G4X(i915)) { in adjust_stolen()
154 if (HAS_LMEM(i915) || HAS_LMEMBAR_SMEM_STOLEN(i915)) in request_smem_stolen()
224 drm_WARN(&i915->drm, GRAPHICS_VER(i915) == 5, in g4x_get_stolen_reserved()
476 } else if (GRAPHICS_VER(i915) >= 5 || IS_G4X(i915)) { in init_reserved_stolen()
498 &i915->dsm.reserved, &i915->dsm.stolen); in init_reserved_stolen()
513 struct drm_i915_private *i915 = mem->i915; in i915_gem_init_stolen() local
524 if (i915_vtd_active(i915) && GRAPHICS_VER(i915) < 8) { in i915_gem_init_stolen()
559 drm_mm_init(&i915->mm.stolen, 0, i915->dsm.usable_size); in i915_gem_init_stolen()
566 if (IS_METEORLAKE(i915) && INTEL_REVID(i915) == 0x0) in i915_gem_init_stolen()
743 struct drm_i915_private *i915 = mem->i915; in _i915_gem_object_stolen_init() local
[all …]
A Di915_gem_pm.c38 flush_workqueue(i915->wq); in i915_gem_suspend()
49 for_each_gt(gt, i915, i) in i915_gem_suspend()
106 i915_gem_suspend(i915); in i915_gem_backup_suspend()
132 lmem_recover(i915); in i915_gem_backup_suspend()
141 &i915->mm.shrink_list, in i915_gem_suspend_late()
142 &i915->mm.purge_list, in i915_gem_suspend_late()
173 for_each_gt(gt, i915, i) in i915_gem_suspend_late()
194 i915_gem_shrink_all(i915); in i915_gem_freeze()
245 for_each_gt(gt, i915, i) in i915_gem_resume()
255 for_each_gt(gt, i915, j) { in i915_gem_resume()
[all …]
A Di915_gem_shrinker.c115 &i915->mm.shrink_list, in i915_gem_shrink()
153 for_each_gt(gt, i915, i) in i915_gem_shrink()
404 for_each_gt(gt, i915, i) { in i915_gem_shrinker_vmap()
432 if (!i915->mm.shrinker) { in i915_gem_driver_register__shrinker()
438 i915->mm.shrinker->private_data = i915; in i915_gem_driver_register__shrinker()
444 drm_WARN_ON(&i915->drm, register_oom_notifier(&i915->mm.oom_notifier)); in i915_gem_driver_register__shrinker()
447 drm_WARN_ON(&i915->drm, in i915_gem_driver_register__shrinker()
453 drm_WARN_ON(&i915->drm, in i915_gem_driver_unregister__shrinker()
455 drm_WARN_ON(&i915->drm, in i915_gem_driver_unregister__shrinker()
502 i915->mm.shrink_count--; in i915_gem_object_make_unshrinkable()
[all …]
/linux/drivers/gpu/drm/xe/
A DMakefile155 $(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
160 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
182 i915-soc/intel_dram.o \
183 i915-soc/intel_pch.o
187 i915-display/icl_dsi.o \
194 i915-display/intel_bw.o \
203 i915-display/intel_ddi.o \
217 i915-display/intel_dp.o \
232 i915-display/intel_fb.o \
257 i915-display/intel_tc.o \
[all …]
/linux/drivers/gpu/drm/xe/compat-i915-headers/
A Dvlv_sideband.h34 static inline void vlv_iosf_sb_write(struct drm_i915_private *i915, in vlv_iosf_sb_write() argument
41 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
51 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
54 static inline void vlv_cck_get(struct drm_i915_private *i915) in vlv_cck_get() argument
64 static inline void vlv_cck_put(struct drm_i915_private *i915) in vlv_cck_put() argument
67 static inline void vlv_ccu_get(struct drm_i915_private *i915) in vlv_ccu_get() argument
77 static inline void vlv_ccu_put(struct drm_i915_private *i915) in vlv_ccu_put() argument
80 static inline void vlv_dpio_get(struct drm_i915_private *i915) in vlv_dpio_get() argument
91 static inline void vlv_dpio_put(struct drm_i915_private *i915) in vlv_dpio_put() argument
107 static inline void vlv_nc_get(struct drm_i915_private *i915) in vlv_nc_get() argument
[all …]

Completed in 76 milliseconds

12345678910>>...20